From: lkcl Date: Thu, 8 Sep 2022 11:52:00 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~639 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84f5ef901bff48e5616a2eaca72e21fc718f4e70;p=libreriscv.git --- diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn index 0769fbe1e..26e68033d 100644 --- a/openpower/sv.mdwn +++ b/openpower/sv.mdwn @@ -138,6 +138,7 @@ Pages being developed and examples or are not immediately apparent despite the RISC paradigm * [[opcode_regs_deduped]] autogenerated table of SVP64 decoder augmentation * [[sv/sprs]] SPRs +* [[sv/rfc]] RFCs to the [OPF ISA WG]() SVP64 "Modes":