From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sat, 19 Sep 2015 03:18:44 +0000 (+0800)
Subject: genlib/CRG: fix variable name conflict
X-Git-Tag: 24jan2021_ls180~2099^2~3^2~72
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84f98b4632aa8141b0418438395228f700bbe84f;p=litex.git

genlib/CRG: fix variable name conflict
---

diff --git a/migen/genlib/io.py b/migen/genlib/io.py
index 3439f088..12d8b0a1 100644
--- a/migen/genlib/io.py
+++ b/migen/genlib/io.py
@@ -48,12 +48,12 @@ class CRG(Module):
             clk = clk_se
 
         # Power on Reset (vendor agnostic)
-        rst = Signal(reset=1)
-        self.sync.por += rst.eq(rst)
+        int_rst = Signal(reset=1)
+        self.sync.por += int_rst.eq(rst)
         self.comb += [
             self.cd_sys.clk.eq(clk),
             self.cd_por.clk.eq(clk),
-            self.cd_sys.rst.eq(rst)
+            self.cd_sys.rst.eq(int_rst)
         ]