From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 7 Jun 2019 16:36:46 +0000 (+0200)
Subject: cpu/vexriscv: update submodule
X-Git-Tag: 24jan2021_ls180~1176
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=850b311d04a834645e5704b6d8a848a1b8902f62;p=litex.git

cpu/vexriscv: update submodule
---

diff --git a/litex/soc/cores/cpu/vexriscv/verilog b/litex/soc/cores/cpu/vexriscv/verilog
index c6dfccaa..4b5a515d 160000
--- a/litex/soc/cores/cpu/vexriscv/verilog
+++ b/litex/soc/cores/cpu/vexriscv/verilog
@@ -1 +1 @@
-Subproject commit c6dfccaaa3c830b8c9c5037bbd4e1a8d43ca5bf0
+Subproject commit 4b5a515d4bbb22df0eb44a6e53cc76b3da1ff470