From: Andreas Sandberg <Andreas.Sandberg@ARM.com>
Date: Tue, 3 Feb 2015 19:25:47 +0000 (-0500)
Subject: dev: Correctly clear interrupts in VirtIO PCI
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=851b29ad2077a886263be0973f58b84bea6641ab;p=gem5.git

dev: Correctly clear interrupts in VirtIO PCI

Correctly clear the PCI interrupt belonging to a VirtIO device when
the ISR register is read.
---

diff --git a/src/dev/virtio/pci.cc b/src/dev/virtio/pci.cc
index a051a8f51..fb0735eba 100644
--- a/src/dev/virtio/pci.cc
+++ b/src/dev/virtio/pci.cc
@@ -123,8 +123,11 @@ PciVirtIO::read(PacketPtr pkt)
       case OFF_ISR_STATUS: {
           DPRINTF(VIOPci, "   ISR_STATUS\n");
           assert(size == sizeof(uint8_t));
-          uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
-          interruptDeliveryPending = false;
+          const uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
+          if (interruptDeliveryPending) {
+              interruptDeliveryPending = false;
+              intrClear();
+          }
           pkt->set<uint8_t>(isr_status);
       } break;