From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 8 Jul 2020 18:45:27 +0000 (+0100)
Subject: add spr to fast reg converter
X-Git-Tag: div_pipeline~149
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8546eb24e9ae7649dccb51f512b9269f29aa15c7;p=soc.git

add spr to fast reg converter
---

diff --git a/src/soc/regfile/util.py b/src/soc/regfile/util.py
index 1587e550..c7d691ce 100644
--- a/src/soc/regfile/util.py
+++ b/src/soc/regfile/util.py
@@ -12,3 +12,18 @@ def fast_reg_to_spr(spr_num):
         return SPR.SRR0.value
     elif spr_num == FastRegs.SRR1:
         return SPR.SRR1.value
+
+
+def spr_to_fast_reg(spr_num):
+    if not isinstance(spr_num, str):
+        spr_num = spr_dict[spr_num].SPR
+    if spr_num == 'CTR':
+        return FastRegs.CTR
+    elif spr_num == 'LR':
+        return FastRegs.LR
+    elif spr_num == 'TAR':
+        return FastRegs.TAR
+    elif spr_num == 'SRR0':
+        return FastRegs.SRR0
+    elif spr_num == 'SRR1':
+        return FastRegs.SRR1