From: lkcl Date: Tue, 25 Apr 2023 16:36:16 +0000 (+0100) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=854b42f1a12860d6761dfad07f44c545a070575c;p=libreriscv.git --- diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index 09183adbd..f1e9f38cd 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -34,13 +34,9 @@ CW2-Form ``` creg = CR[4*BFA+32:4*BFA+35] - n0 = fmsk[0] & (fmap[0] == creg[0]) - n1 = fmsk[1] & (fmap[1] == creg[1]) - n2 = fmsk[2] & (fmap[2] == creg[2]) - n3 = fmsk[3] & (fmap[3] == creg[3]) - n = (n0||n1||n2||n3) & fmsk + n = (¬fmap ^ creg) & fmsk result = (n != 0) if M else (n == fmsk) - RT[63] = result # MSB0 numbering, 63 is LSB + RT = [0] * 63 || result If Rc: CR0 = analyse(RT) ``` @@ -73,14 +69,8 @@ CW2-Form * mfcrrweird. RT,BFA,fmsk,fmap (Rc=1) ``` - - - creg = CR[4*BFA+32:4*BFA+35] - n0 = fmsk[0] & (fmap[0] == creg[0]) - n1 = fmsk[1] & (fmap[1] == creg[1]) - n2 = fmsk[2] & (fmap[2] == creg[2]) - n3 = fmsk[3] & (fmap[3] == creg[3]) - result = n0||n1||n2||n3 + creg = CR[4*BFA+32:4*BFA+35] + result = (¬fmap ^ creg) & fmsk RT[60:63] = result # MSB0 numbering, 63 is LSB If Rc: CR0 = analyse(RT) @@ -96,6 +86,8 @@ into the destination. *Destination elwidth overrides still apply* ## mtcrrweird +CW-Form + ``` |0 |6 |9 |11|12 |16 |19 |22 |26 |31| | PO | RA |M |fmsk |BF |XO |fmap | XO | @@ -103,16 +95,12 @@ into the destination. *Destination elwidth overrides still apply* | PO | BF | |M |fmsk |BF |XO |fmap | XO | ``` +* mtcrrweird BF,RA,M,fmsk,fmap ``` - mtcrrweird: BF,RA,M,fmsk,fmap - a = (RA|0) - n0 = fmsk[0] & (fmap[0] == a[63]) - n1 = fmsk[1] & (fmap[1] == a[62]) - n2 = fmsk[2] & (fmap[2] == a[61]) - n3 = fmsk[3] & (fmap[3] == a[60]) - result = n0 || n1 || n2 || n3 + creg = a[60:63] + result = (¬fmap ^ creg) & fmsk if M: result |= CR[4*BF+32:4*BF+35] & ~fmsk CR[4*BF+32:4*BF+35] = result @@ -127,16 +115,21 @@ on the `BF` CR Field. When M=0 it is a more normal Write. ## mtcrweird +CW-Form + +``` + |0 |6 |9 |11|12 |16 |19 |22 |26 |31| + | PO | RA |M |fmsk |BF |XO |fmap | XO | + | PO | BT |M |fmsk |BF |XO |fmap | XO | + | PO | BF | |M |fmsk |BF |XO |fmap | XO | +``` + * mtcrweird BF,RA,M,fmsk,fmap ``` reg = (RA|0) - lsb = reg[63] # MSB0 numbering, the LSB - n0 = fmsk[0] & (fmap[0] == lsb) - n1 = fmsk[1] & (fmap[1] == lsb) - n2 = fmsk[2] & (fmap[2] == lsb) - n3 = fmsk[3] & (fmap[3] == lsb) - result = n0 || n1 || n2 || n3 + creg = reg[63] || reg[63] || reg[63] || reg[63] + result = (¬fmap ^ creg) & fmsk if M: result |= CR[4*BF+32:4*BF+35] & ~fmsk CR[4*BF+32:4*BF+35] = result @@ -154,24 +147,16 @@ capability (BF is 3 bits) ## mcrfm - Move CR Field, masked. +CW-Form + ``` |0 |6 |9 |11|12 |16 |19 |22 |26 |31| - | PO | RA |M |fmsk |BF |XO |fmap | XO | - | PO | BT |M |fmsk |BF |XO |fmap | XO | | PO | BF | |M |fmsk |BF |XO |fmap | XO | ``` -This instruction copies, sets, or inverts parts of a CR Field -into another CR Field. `mcrf` copies only one bit of the CR -from any arbitrary bit to any other arbitrary bit, whereas -`mcrfm` copies an entire 4-bit CR Field (or masked parts thereof). -Unlike `mcrf` the bits of the CR Field may not change position: -the EQ bit from the source may only go into the EQ bit of the -destination (optionally inverted, set, or cleared). +* mcrfm: BF,BFA,M,fmsk,fmap ``` - mcrfm: BF,BFA,M,fmsk,fmap - result = fmsk & CR[4*BFA+32:4*BFA+35] CR{BF} = result if M: @@ -180,6 +165,14 @@ destination (optionally inverted, set, or cleared). CR[4*BF+32:4*BF+35] = result ``` +This instruction copies, sets, or inverts parts of a CR Field +into another CR Field. `mcrf` copies only one bit of the CR +from any arbitrary bit to any other arbitrary bit, whereas +`mcrfm` copies an entire 4-bit CR Field (or masked parts thereof). +Unlike `mcrf` the bits of the CR Field may not change position: +the EQ bit from the source may only go into the EQ bit of the +destination (optionally inverted, set, or cleared). + When M=1 this operation is a Read-Modify-Write on the CR Field BF. Masked-out bits of the 4-bit CR Field BF will not be changed when M=1. Correspondingly when M=0 this operation is an overwrite: no read @@ -200,14 +193,12 @@ individual bits in BF may be set to 1 by ensuring that the required bit of ``` |0 |6 |9 |11|12 |16 |19 |22 |26 |31| - | PO | RA |M |fmsk |BF |XO |fmap | XO | | PO | BT |M |fmsk |BF |XO |fmap | XO | - | PO | BF | |M |fmsk |BF |XO |fmap | XO | ``` -``` - crweirder: BT,BFA,fmsk,fmap +* crweirder: BT,BFA,fmsk,fmap +``` creg = CR[4*BFA+32:4*BFA+35] n = (¬fmap ^ creg) & fmsk result = (n != 0) if M else (n == fmsk) @@ -215,11 +206,11 @@ individual bits in BF may be set to 1 by ensuring that the required bit of ``` When used with SVP64 Prefixing this is a [[sv/cr_ops]] SVP64 -type operation that has 5-bit Data-dependent and 5-bit Predicate-result +type operation that has 5-bit Data-dependent capability (BT is 5 bits) -Hardware Architectural Note: when M=1 this instruction is a Read-Modify-Write -on the `BT` CR bit. When M=0 it is a more normal Write. +Hardware Architectural Note: this instruction is always a Read-Modify-Write +on the CR Field containing `BT`. **Example Pseudo-ops:**