From: Nick Clifton Date: Mon, 2 Nov 2015 14:37:33 +0000 (+0000) Subject: Disassemble RX NOP instructions as such. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=854eb72b00ba46d65ce36dc3432f01e223ce44cb;p=binutils-gdb.git Disassemble RX NOP instructions as such. opcode * rx.h (enum RX_Opcode_ID): Add more NOP opcodes. opcodes * rx-decode.opc (rx_decode_opcode): Decode extra NOP instructions. * rx-decode.c: Regenerate. tests * gas/rx/max.d: Update expecetd disassembly. * gas/rx/nod.d: Likewise. * gas/rx/nop.sm: Add tests of more NOP instructions. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 32284de13ae..5e1e88f4a73 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2015-11-02 Nick Clifton + + * gas/rx/max.d: Update expected disassembly. + * gas/rx/nod.d: Likewise. + * gas/rx/nop.sm: Add tests of more NOP instructions. + 2015-11-02 Nick Clifton * gas/rx/mov.sm: Add tests for zero offset indirect moves. diff --git a/gas/testsuite/gas/rx/max.d b/gas/testsuite/gas/rx/max.d index 6eff09f4227..229a30dfe9f 100644 --- a/gas/testsuite/gas/rx/max.d +++ b/gas/testsuite/gas/rx/max.d @@ -3,9 +3,9 @@ dump\.o: file format .* -Disassembly of section \.text: +Disassembly of section \..*: -00000000 <\.text>: +00000000 <\..*>: 0: fd 74 40 80 max #-128, r0 4: fd 74 4f 80 max #-128, r15 8: fd 74 40 7f max #127, r0 @@ -18,7 +18,7 @@ Disassembly of section \.text: 2c: fd 7c 4f 00 00 80 max #0xff800000, r15 32: fd 7c 40 ff ff 7f max #0x7fffff, r0 38: fd 7c 4f ff ff 7f max #0x7fffff, r15 - 3e: fd 70 40 00 00 00 80 max #0x80000000, r0 + 3e: fd 70 40 00 00 00 80 nop ; max #0x80000000, r0 45: fd 70 4f 00 00 00 80 max #0x80000000, r15 4c: fd 70 40 ff ff ff 7f max #0x7fffffff, r0 53: fd 70 4f ff ff ff 7f max #0x7fffffff, r15 diff --git a/gas/testsuite/gas/rx/nop.d b/gas/testsuite/gas/rx/nop.d index ca00f428975..28988cc6a19 100644 --- a/gas/testsuite/gas/rx/nop.d +++ b/gas/testsuite/gas/rx/nop.d @@ -3,7 +3,14 @@ dump\.o: file format .* -Disassembly of section \.text: +Disassembly of section \..*: -00000000 <\.text>: +00000000 <\..*>: 0: 03 nop + 1: ef 00 nop ; mov.l r0, r0 + 3: 63 10 nop ; mul #1, r0 + 5: fc 13 00 nop ; max r0, r0 + 8: 76 10 01 00 nop ; mul #1, r0 + c: 77 10 01 00 00 nop ; mul #1, r0 + 11: 74 10 01 00 00 00 nop ; mul #1, r0 + 17: fd 70 40 00 00 00 80 nop ; max #0x80000000, r0 diff --git a/gas/testsuite/gas/rx/nop.sm b/gas/testsuite/gas/rx/nop.sm index 4e7fe2f0a49..33d172dd437 100644 --- a/gas/testsuite/gas/rx/nop.sm +++ b/gas/testsuite/gas/rx/nop.sm @@ -1 +1,8 @@ nop + mov.l r0,r0 + mul #1,r0 + max r0,r0 + .byte 0x76, 0x10, 0x01, 0x00 + .byte 0x77, 0x10, 0x01, 0x00, 0x00 + .byte 0x74, 0x10, 0x01, 0x00, 0x00, 0x00 + max #0x80000000,r0 diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 18361ec44c0..b0fff81294c 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2015-11-02 Nick Clifton + + * rx.h (enum RX_Opcode_ID): Add more NOP opcodes. + 2015-11-02 Nick Clifton * rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect. diff --git a/include/opcode/rx.h b/include/opcode/rx.h index 66a1b34c700..b8ef163994d 100644 --- a/include/opcode/rx.h +++ b/include/opcode/rx.h @@ -104,6 +104,10 @@ typedef enum RXO_nop, RXO_nop2, RXO_nop3, + RXO_nop4, + RXO_nop5, + RXO_nop6, + RXO_nop7, RXO_scmpu, RXO_smovu, diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1ca97eec29b..7c30a4896d5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2015-11-02 Nick Clifton + + * rx-decode.opc (rx_decode_opcode): Decode extra NOP + instructions. + * rx-decode.c: Regenerate. + 2015-11-02 Nick Clifton * rx-decode.opc (rx_disp): If the displacement is zero, set the diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c index ada39933ebc..3a9099b1ff3 100644 --- a/opcodes/rx-decode.c +++ b/opcodes/rx-decode.c @@ -4256,8 +4256,16 @@ rx_decode_opcode (unsigned long pc AU, } SYNTAX("mul #%1, %0"); #line 602 "rx-decode.opc" - ID(mul); DR(rdst); SC(immm); F_____; - + if (immm == 1 && rdst == 0) + { + ID(nop2); + SYNTAX ("nop\t; mul\t#1, r0"); + } + else + { + ID(mul); + } + DR(rdst); SC(immm); F_____; } break; } @@ -4624,6 +4632,7 @@ rx_decode_opcode (unsigned long pc AU, int im AU = op[0] & 0x03; #line 605 "rx-decode.opc" int rdst AU = op[1] & 0x0f; + int val = IMMex(im); if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", @@ -4634,7 +4643,25 @@ rx_decode_opcode (unsigned long pc AU, } SYNTAX("mul #%1, %0"); #line 605 "rx-decode.opc" - ID(mul); DR(rdst); SC(IMMex(im)); F_____; + if (val == 1 && rdst == 0) + { + SYNTAX("nop\t; mul\t#1, r0"); + switch (im) + { + case 2: ID(nop4); break; + case 3: ID(nop5); break; + case 0: ID(nop6); break; + default: + ID(mul); + SYNTAX("mul #%1, %0"); + break; + } + } + else + { + ID(mul); + } + DR(rdst); SC(val); F_____; } break; @@ -6346,19 +6373,19 @@ rx_decode_opcode (unsigned long pc AU, if (sd == 3 && ss == 3 && sz == 2 && rsrc == 0 && rdst == 0) { ID(nop2); - rx->syntax = "nop"; + SYNTAX ("nop\t; mov.l\tr0, r0"); } else { ID(mov); sBWL(sz); F_____; if ((ss == 3) && (sd != 3)) - { - SD(ss, rdst, sz); DD(sd, rsrc, sz); - } + { + SD(ss, rdst, sz); DD(sd, rsrc, sz); + } else - { - SD(ss, rsrc, sz); DD(sd, rdst, sz); - } + { + SD(ss, rsrc, sz); DD(sd, rdst, sz); + } } } @@ -7204,7 +7231,7 @@ rx_decode_opcode (unsigned long pc AU, if (ss == 3 && rsrc == 0 && rdst == 0) { ID(nop3); - rx->syntax = "nop"; + SYNTAX ("nop\t; max\tr0, r0"); } else { @@ -10331,6 +10358,7 @@ rx_decode_opcode (unsigned long pc AU, int im AU = (op[1] >> 2) & 0x03; #line 570 "rx-decode.opc" int rdst AU = op[2] & 0x0f; + int val = IMMex (im); if (trace) { printf ("\033[33m%s\033[0m %02x %02x %02x\n", @@ -10341,8 +10369,16 @@ rx_decode_opcode (unsigned long pc AU, } SYNTAX("max #%1, %0"); #line 570 "rx-decode.opc" - ID(max); DR(rdst); SC(IMMex(im)); - + if (im == 0 && (unsigned) val == 0x80000000 && rdst == 0) + { + ID(nop7); + SYNTAX ("nop\t; max\t#0x80000000, r0"); + } + else + { + ID(max); + } + DR(rdst); SC(val); } break; case 0x50: diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc index 2409f7f5206..12f689398e7 100644 --- a/opcodes/rx-decode.opc +++ b/opcodes/rx-decode.opc @@ -310,7 +310,7 @@ rx_decode_opcode (unsigned long pc AU, if (sd == 3 && ss == 3 && sz == 2 && rsrc == 0 && rdst == 0) { ID(nop2); - rx->syntax = "nop"; + SYNTAX ("nop\t; mov.l\tr0, r0"); } else { @@ -567,13 +567,23 @@ rx_decode_opcode (unsigned long pc AU, /* MAX */ /** 1111 1101 0111 im00 0100rdst max #%1, %0 */ - ID(max); DR(rdst); SC(IMMex(im)); + int val = IMMex (im); + if (im == 0 && (unsigned) val == 0x80000000 && rdst == 0) + { + ID (nop7); + SYNTAX("nop\t; max\t#0x80000000, r0"); + } + else + { + ID(max); + } + DR(rdst); SC(val); /** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */ if (ss == 3 && rsrc == 0 && rdst == 0) { ID(nop3); - rx->syntax = "nop"; + SYNTAX("nop\t; max\tr0, r0"); } else { @@ -599,10 +609,38 @@ rx_decode_opcode (unsigned long pc AU, /* MUL */ /** 0110 0011 immm rdst mul #%1, %0 */ - ID(mul); DR(rdst); SC(immm); F_____; + if (immm == 1 && rdst == 0) + { + ID(nop2); + SYNTAX ("nop\t; mul\t#1, r0"); + } + else + { + ID(mul); + } + DR(rdst); SC(immm); F_____; /** 0111 01im 0001rdst mul #%1, %0 */ - ID(mul); DR(rdst); SC(IMMex(im)); F_____; + int val = IMMex(im); + if (val == 1 && rdst == 0) + { + SYNTAX("nop\t; mul\t#1, r0"); + switch (im) + { + case 2: ID(nop4); break; + case 3: ID(nop5); break; + case 0: ID(nop6); break; + default: + ID(mul); + SYNTAX("mul #%1, %0"); + break; + } + } + else + { + ID(mul); + } + DR(rdst); SC(val); F_____; /** 0100 11ss rsrc rdst mul %1%S1, %0 */ ID(mul); SP(ss, rsrc); DR(rdst); F_____;