From: Clifford Wolf Date: Fri, 13 Sep 2019 08:19:58 +0000 (+0200) Subject: Fix lexing of integer literals without radix X-Git-Tag: working-ls180~1067^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=855e6a9b9172e6817c9ff57f7041b09a1cc0367e;p=yosys.git Fix lexing of integer literals without radix Signed-off-by: Clifford Wolf --- diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index e344ffd4f..4acfb414d 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -239,7 +239,7 @@ YOSYS_NAMESPACE_END return TOK_CONSTVAL; } -[0-9]*[ \t]*\'[sS]?[bodhBODH][ \t\r\n]*[0-9a-fA-FzxZX?_]+ { +[0-9]*[ \t]*\'[sS]?[bodhBODH]?[ \t\r\n]*[0-9a-fA-FzxZX?_]+ { frontend_verilog_yylval.string = new std::string(yytext); return TOK_CONSTVAL; }