From: Brad Beckmann <Brad.Beckmann@amd.com>
Date: Tue, 24 Aug 2010 20:20:31 +0000 (-0700)
Subject: config: fixed ruby dma device connections
X-Git-Tag: stable_2012_02_02~862
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8572d8fd9190884dc70e9db60f80e4778f65c44b;p=gem5.git

config: fixed ruby dma device connections
---

diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index d46bec410..6509490d7 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -124,9 +124,10 @@ def makeLinuxAlphaRubySystem(mem_mode, mdesc = None):
     self.tsunami.ethernet.pio = self.piobus.port
 
     #
-    # store the dma devices for later connection to dma ruby ports
+    # Store the dma devices for later connection to dma ruby ports.
+    # Append an underscore to dma_devices to avoid the SimObjectVector check.
     #
-    self.dma_devices = [self.tsunami.ide, self.tsunami.ethernet]
+    self._dma_devices = [self.tsunami.ide, self.tsunami.ethernet]
 
     self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
                                                read_only = True))
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index a4ae1c76b..017b24d9d 100644
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -115,7 +115,7 @@ system = makeLinuxAlphaRubySystem(test_mem_mode, bm[0])
 system.ruby = Ruby.create_system(options,
                                  system,
                                  system.piobus,
-                                 system.dma_devices)
+                                 system._dma_devices)
 
 system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
 
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py
index f6dafa44a..91a76497e 100644
--- a/configs/ruby/MESI_CMP_directory.py
+++ b/configs/ruby/MESI_CMP_directory.py
@@ -151,12 +151,11 @@ def create_system(options, system, piobus, dma_devices):
         dma_cntrl = DMA_Controller(version = i,
                                    dma_sequencer = dma_seq)
 
-        dma_cntrl.dma_sequencer.port = dma_device.dma
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \
diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py
index 4498617a9..11b65c397 100644
--- a/configs/ruby/MOESI_CMP_directory.py
+++ b/configs/ruby/MOESI_CMP_directory.py
@@ -152,10 +152,9 @@ def create_system(options, system, piobus, dma_devices):
 
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
-        dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \
diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py
index ba61c727a..1e1190cae 100644
--- a/configs/ruby/MOESI_CMP_token.py
+++ b/configs/ruby/MOESI_CMP_token.py
@@ -178,10 +178,9 @@ def create_system(options, system, piobus, dma_devices):
 
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
-        dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \