From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 19 Oct 2018 10:58:25 +0000 (+0100)
Subject: use class-based sv_reg_t and sv_sreg_t
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=858db24c42db947e8b6258047bded6f59bb4e576;p=riscv-isa-sim.git

use class-based sv_reg_t and sv_sreg_t
---

diff --git a/riscv/sv_decode.h b/riscv/sv_decode.h
index deab217..88e4347 100644
--- a/riscv/sv_decode.h
+++ b/riscv/sv_decode.h
@@ -5,8 +5,8 @@
 
 #include "sv.h"
 #include "decode.h"
-//#include "sv_reg.h"
-typedef reg_t sv_reg_t;
+#include "sv_reg.h"
+//typedef reg_t sv_reg_t;
 
 //#include "processor.h"
 
diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 7282b88..f4d7711 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -1,7 +1,7 @@
 #include "sv_insn_redirect.h"
 #include "processor.h"
 #include "mulhi.h"
-//#include "sv_reg.h"
+#include "sv_reg.h"
 
 void (sv_proc_t::WRITE_FRD)(float32_t value)
 {
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index 045d2ab..9d09eb7 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -4,7 +4,7 @@
 #include <stdio.h>
 #include "decode.h"
 #include "sv_decode.h"
-//#include "sv_reg.h"
+#include "sv_reg.h"
 
 #undef RS1
 #undef RS2
@@ -44,8 +44,8 @@ class insn_t;
 #define SHAMT get_shamt()
 #define UINT64_MAX uint64_max()
 
-typedef reg_t sv_reg_t;
-typedef sreg_t sv_sreg_t;
+//typedef reg_t sv_reg_t;
+//typedef sreg_t sv_sreg_t;
 
 class sv_proc_t
 {
diff --git a/riscv/sv_reg.h b/riscv/sv_reg.h
index a1a6dbf..a29bcfc 100644
--- a/riscv/sv_reg.h
+++ b/riscv/sv_reg.h
@@ -1,9 +1,11 @@
 #ifndef SV_REG_H
 #define SV_REG_H
 
+class sv_sreg_t;
+
 class sv_reg_t {
 public:
-    sv_reg_t(uint64_t _reg) : reg(_reg), elwidth(0) {} // default elwidth
+    sv_reg_t(uint64_t _reg) : reg(_reg), elwidth(0) { } // default elwidth
     sv_reg_t(uint64_t _reg, uint8_t _elwidth) : reg(_reg), elwidth(_elwidth) {}
 
     uint64_t reg;
@@ -11,6 +13,11 @@ public:
 public:
   uint64_t get_data() { return reg; }
   uint8_t get_width() { return elwidth; }
+
+  //operator uint32_t() { return (uint32_t)get_data(); }
+  operator uint64_t() { return (uint64_t)get_data(); }
+  //operator int64_t() { return (int64_t)get_data(); }
+  operator sv_sreg_t();
 };
 
 class sv_sreg_t {
@@ -23,7 +30,11 @@ public:
 public:
   int64_t get_data() { return reg; }
   uint8_t get_width() { return elwidth; }
+
+  operator int64_t() { return (int64_t)get_data(); }
+  operator sv_reg_t() { return sv_reg_t((uint64_t)reg, elwidth); }
 };
 
+inline sv_reg_t::operator sv_sreg_t() { return sv_sreg_t((int64_t)reg, elwidth); }
 
 #endif