From: Ali Saidi Date: Tue, 5 Jun 2007 05:03:35 +0000 (-0400) Subject: Clean up some of vincent's code and commit it X-Git-Tag: m5_2.0_beta4~378^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=85986e9dff0e3dc7e54adf4da54a7c099c7e815f;p=gem5.git Clean up some of vincent's code and commit it Makes page table cache scheme actually work src/mem/page_table.cc: src/mem/page_table.hh: fix caching scheme to actually work and improve performance --HG-- extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd --- diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc index 96bc23793..b29a07078 100644 --- a/src/mem/page_table.cc +++ b/src/mem/page_table.cc @@ -90,8 +90,6 @@ PageTable::page_check(Addr addr, int64_t size) const } - - void PageTable::allocate(Addr vaddr, int64_t size) { @@ -109,12 +107,7 @@ PageTable::allocate(Addr vaddr, int64_t size) } pTable[vaddr] = system->new_page(); - pTableCache[2].paddr = pTableCache[1].paddr; - pTableCache[2].vaddr = pTableCache[1].vaddr; - pTableCache[1].paddr = pTableCache[0].paddr; - pTableCache[1].vaddr = pTableCache[0].vaddr; - pTableCache[0].paddr = pTable[vaddr]; - pTableCache[0].vaddr = vaddr; + updateCache(vaddr, pTable[vaddr]); } } @@ -126,16 +119,16 @@ PageTable::translate(Addr vaddr, Addr &paddr) Addr page_addr = pageAlign(vaddr); paddr = 0; - if (pTableCache[0].vaddr == vaddr) { - paddr = pTableCache[0].paddr; + if (pTableCache[0].vaddr == page_addr) { + paddr = pTableCache[0].paddr + pageOffset(vaddr); return true; } - if (pTableCache[1].vaddr == vaddr) { - paddr = pTableCache[1].paddr; + if (pTableCache[1].vaddr == page_addr) { + paddr = pTableCache[1].paddr + pageOffset(vaddr); return true; } - if (pTableCache[2].vaddr == vaddr) { - paddr = pTableCache[2].paddr; + if (pTableCache[2].vaddr == page_addr) { + paddr = pTableCache[2].paddr + pageOffset(vaddr); return true; } @@ -145,6 +138,7 @@ PageTable::translate(Addr vaddr, Addr &paddr) return false; } + updateCache(page_addr, iter->second); paddr = iter->second + pageOffset(vaddr); return true; } diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh index 0e2b1f58c..64c824238 100644 --- a/src/mem/page_table.hh +++ b/src/mem/page_table.hh @@ -95,6 +95,22 @@ class PageTable */ Fault translate(RequestPtr &req); + /** + * Update the page table cache. + * @param vaddr virtual address (page aligned) to check + * @param paddr physical address (page aligned) to return + */ + inline void updateCache(Addr vaddr, Addr paddr) + { + pTableCache[2].paddr = pTableCache[1].paddr; + pTableCache[2].vaddr = pTableCache[1].vaddr; + pTableCache[1].paddr = pTableCache[0].paddr; + pTableCache[1].vaddr = pTableCache[0].vaddr; + pTableCache[0].paddr = paddr; + pTableCache[0].vaddr = vaddr; + } + + void serialize(std::ostream &os); void unserialize(Checkpoint *cp, const std::string §ion); };