From: colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 Date: Sun, 11 Apr 2021 00:08:09 +0000 (+0100) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~1077^2~10 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=85a87deaf9b9cc6843d044ba4e9bac63e3631afd;p=libreriscv.git --- diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn index e268ae915..7aae315ea 100644 --- a/HDL_workflow/ECP5_FPGA.mdwn +++ b/HDL_workflow/ECP5_FPGA.mdwn @@ -52,8 +52,6 @@ We will wire each of the pins on the the ft232r according to the diagrams, table According to [https://www.sparkfun.com/datasheets/IC/FT232R_v104.pdf], page 8 - Table 1: pin 4 - VCCIO - should be supplied *by the FPGA*. -According to Jacob: you nearly always need gnd for a return path for the current. if you don't have a return path right near the signal lines, it will totally mess up high speed signals, due to the extra inductance caused by the loop through the signal and off to a ground somewhere. - Therefore we will not attach any jumpers to the red VCC wire of the ft232r cable, nor the fpga. | Action | Colour | Pin Name |