From: lkcl <lkcl@web>
Date: Sat, 15 Apr 2023 22:40:13 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls009_v1~58
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=85b31a9421e90c21c15a3cc68cc9158865b71daa;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index c7c0a76f5..5bf81df42 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -72,7 +72,15 @@ There are four types of REMAP:
 Best implemented on top of a Multi-Issue Out-of-Order Micro-architecture,
 REMAP Schedules are 100% Deterministic **including Indexing** and are
 designed to be incorporated in between the Decode and Issue phases,
-directly into Register Hazard Management.
+directly into Register Hazard Management
+
+As long as the SVSHAPE SPRs
+are not written to directly, Hardware may treat REMAP as 100%
+Deterministic: all REMAP Management instructions take static
+operands with the exception of Indexed Mode, and even then
+Architectural State is permitted to assume that the Indices
+are cacheable from the point at which the `svindex` instruction
+is executed.
 
 Parallel Reduction is unusual in that it requires a full vector array
 of results (not a scalar) and uses the rest of the result Vector for