From: Evandro Menezes Date: Mon, 6 Apr 2015 19:19:43 +0000 (+0000) Subject: add option for the Samsung Exynos M1 core for AArch64 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=85bb7f7f02e794b336fa9700424c024beb15aeb1;p=gcc.git add option for the Samsung Exynos M1 core for AArch64 * doc/invoke.texi (AARCH64/mtune): Add exynos-m1 as an option. * config/aarch64/aarch64-cores.def (exynos-m1): New core. * config/aarch64/aarch64-tune.md: Regenerate. From-SVN: r221884 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d40cd516d78..9d22614cd15 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-04-06 Evandro Menezes + + * doc/invoke.texi (AARCH64/mtune): Add exynos-m1 as an option. + * config/aarch64/aarch64-cores.def (exynos-m1): New core. + * config/aarch64/aarch64-tune.md: Regenerate. + 2015-04-06 Evandro Menezes * doc/invoke.texi (ARM/mtune): Add "exynos-m1" as an option. diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 9b2eca27726..e46d91b0504 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -37,6 +37,7 @@ AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53) AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57) +AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57) AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx) AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1) diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index c3305f9935c..7d063e45e7d 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa53,cortexa57,cortexa72,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" + "cortexa53,cortexa57,cortexa72,exynosm1,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 38e0f650aea..f9781f4327a 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12335,8 +12335,8 @@ architecture. @opindex mtune Specify the name of the target processor for which GCC should tune the performance of the code. Permissible values for this option are: -@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, -@samp{cortex-a72}, @samp{thunderx}, @samp{xgene1}. +@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, +@samp{exynos-m1}, @samp{thunderx}, @samp{xgene1}. Additionally, this option can specify that GCC should tune the performance of the code for a big.LITTLE system. Permissible values for this