From: Cesar Strauss <cestrauss@gmail.com>
Date: Wed, 21 Apr 2021 17:22:55 +0000 (-0300)
Subject: Fix comment in CR predication test case
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=85bdd84d8dabbc9bfb50e4ba429c97ff242200c0;p=soc.git

Fix comment in CR predication test case

The comment at the top of the test case was inconsistent with it:
"adds, CR predicated mask CR4.eq = 1, CR5.eq = 0, invert (ne)"
The whole test is consistent with this (mask is NE and first element is
skipped).
The shift amount itself is also consistent with setting of CR4, not CR5.
---

diff --git a/src/soc/decoder/isa/test_caller_svp64_predication.py b/src/soc/decoder/isa/test_caller_svp64_predication.py
index eed0b79c..20b7c278 100644
--- a/src/soc/decoder/isa/test_caller_svp64_predication.py
+++ b/src/soc/decoder/isa/test_caller_svp64_predication.py
@@ -173,8 +173,8 @@ class DecoderTestCase(FHDLTestCase):
         expected_regs[1] = 0xbeef
         expected_regs[2] = 0x3334
 
-        # set up CR predicate - CR4.eq=0 and CR5.eq=1
-        cr = (0b0010) << ((7-4)*4) # CR5.eq (we hope)
+        # set up CR predicate - CR4.eq=1 and CR5.eq=0
+        cr = (0b0010) << ((7-4)*4) # CR4.eq (we hope)
 
         with Program(lst, bigendian=False) as program:
             sim = self.run_tst_program(program, initial_regs, svstate,