From: Alan Modra <amodra@gmail.com>
Date: Wed, 3 Aug 2016 00:42:06 +0000 (+0930)
Subject: [RS6000] power8 unaligned fp load/store
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=860271ec6cd4c9419f91eac6cea76ea574397d5c;p=gcc.git

[RS6000] power8 unaligned fp load/store

According to the POWER8 Processor User’s Manual and some
experimentation on power8 hardware, unaligned fp load/store on power8
does not invoke the alignment interrupt.

	* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar
	float access depend on TARGET_EFFICIENT_UNALIGNED_VSX.
	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed
	from -mefficient-unaligned-vector.  Note that this affects fp too.

From-SVN: r239013
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e8de5b9f605..3da9eb70fff 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-08-03  Alan Modra  <amodra@gmail.com>
+
+	* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar
+	float access depend on TARGET_EFFICIENT_UNALIGNED_VSX.
+	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed
+	from -mefficient-unaligned-vector.  Note that this affects fp too.
+
 2016-08-03  Alan Modra  <amodra@gmail.com>
 
 	* config/rs6000/rs6000.c (rs6000_rtx_costs): Make unaligned mem
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 9b3e83bcd30..af77258f1e3 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -990,10 +990,10 @@ enum data_align { align_abi, align_opt, align_both };
    aligned to 4 or 8 bytes.  */
 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)				\
   (STRICT_ALIGNMENT							\
-   || (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32)		\
-   || (!TARGET_EFFICIENT_UNALIGNED_VSX                                  \
-       && ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE))		\
-	   && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))))
+   || (!TARGET_EFFICIENT_UNALIGNED_VSX					\
+       && ((SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32)	\
+	   || ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE))	\
+	       && (int) (ALIGN) < VECTOR_ALIGN (MODE)))))
 
 
 /* Standard register usage.  */
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9e9d33e0d32..e47f47fb509 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -211,9 +211,9 @@ mallow-movmisalign
 Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) Save
 ; Allow the movmisalign in DF/DI vectors
 
-mefficient-unaligned-vector
+mefficient-unaligned-vsx
 Target Undocumented Report Mask(EFFICIENT_UNALIGNED_VSX) Var(rs6000_isa_flags)
-; Consider unaligned VSX accesses to be efficient
+; Consider unaligned VSX vector and fp accesses to be efficient
 
 mallow-df-permute
 Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) Save