From: Robert Jordens Date: Thu, 19 Mar 2015 17:47:54 +0000 (+0100) Subject: pipistrello: rename sdram->ddram X-Git-Tag: 24jan2021_ls180~2099^2~160 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=860b72c8b6a47e8bb03d059a5a6cf28f172f928e;p=litex.git pipistrello: rename sdram->ddram --- diff --git a/mibuild/platforms/pipistrello.py b/mibuild/platforms/pipistrello.py index dc9bebd4..65e8d106 100644 --- a/mibuild/platforms/pipistrello.py +++ b/mibuild/platforms/pipistrello.py @@ -97,13 +97,13 @@ _io = [ IOStandard("LVTTL") ), - ("sdram_clock", 0, + ("ddram_clock", 0, Subsignal("p", Pins("G3")), Subsignal("n", Pins("G1")), IOStandard("MOBILE_DDR") ), - ("sdram", 0, + ("ddram", 0, Subsignal("a", Pins("J7 J6 H5 L7 F3 H4 H3 H6 D2 D1 F4 D3 G6")), Subsignal("ba", Pins("F2 F1")), Subsignal("cke", Pins("H7")),