From: lkcl <lkcl@web>
Date: Tue, 1 Mar 2022 08:05:45 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3168
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8619cef5b7e3bb16211902f1e3216f4a769b4c1b;p=libreriscv.git

---

diff --git a/openpower/openpower/whitepapers/microcontroller_power_isa_for_ai.mdwn b/openpower/openpower/whitepapers/microcontroller_power_isa_for_ai.mdwn
index a8afbf69f..1c64780eb 100644
--- a/openpower/openpower/whitepapers/microcontroller_power_isa_for_ai.mdwn
+++ b/openpower/openpower/whitepapers/microcontroller_power_isa_for_ai.mdwn
@@ -1,5 +1,7 @@
 # Increasing area efficiency and reducing resource utilisation for the Power ISA
 
+originally posted at: <https://lists.libre-soc.org/pipermail/libre-soc-dev/2022-February/004505.html>
+
 in between attempting to compile microwatt and Libre-SOC for an 85k LUT4 FPGA which took 4 hours (and then did not run), i decided to see if, in Libre-SOC's HDL, what level of resource reduction could be achieved by going to 32 bit ALUs and register files.
 
 the difference was an astounding 1.4 to 1.