From: Kazu Hirata <kazu@cs.umass.edu>
Date: Thu, 9 Jan 2003 13:05:49 +0000 (+0000)
Subject: h8300.md (*addsi3_upper): New.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=867504e66013d99de08cb244ffc911c829b6fb82;p=gcc.git

h8300.md (*addsi3_upper): New.

	* config/h8300/h8300.md (*addsi3_upper): New.
	(*iorsi3_shift): Likewise.
	(two splitters): Likewise.
	(*addsi3_shift): Likewise.
	(two splitters): Likewise.

From-SVN: r61106
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c0689759663..6b58b1d2c30 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2003-01-09  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (*addsi3_upper): New.
+	(*iorsi3_shift): Likewise.
+	(two splitters): Likewise.
+	(*addsi3_shift): Likewise.
+	(two splitters): Likewise.
+
 2003-01-09  Josef Zlomek  <zlomj9am@artax.karlin.mff.cuni.cz>
 
 	* Makefile.in (optabs.o): Add dependency on basic-block.h.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 2f7619ab8eb..65ff9888e40 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2600,6 +2600,16 @@
 
 ;; plus:SI
 
+(define_insn "*addsi3_upper"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
+			  (const_int 65536))
+		 (match_operand:SI 2 "register_operand" "0")))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "add.w\\t%f1,%e0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
+
 (define_insn "*addsi3_lshiftrt_16_zexthi"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(plus:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
@@ -2691,6 +2701,116 @@
   [(set_attr "cc" "clobber")
    (set_attr "length" "2")])
 
+;; Used to OR the exponent of a float.
+
+(define_insn "*iorsi3_shift"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")
+			   (const_int 23))
+		(match_operand:SI 2 "register_operand" "0")))
+   (clobber (match_scratch:SI 3 "=&r"))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "#")
+
+(define_split
+  [(parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+	  (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "")
+			     (const_int 23))
+		  (match_dup 0)))
+     (clobber (match_operand:SI 2 "register_operand" ""))])]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && flow2_completed
+   && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))
+   && REGNO (operands[0]) != REGNO (operands[1])"
+  [(parallel [(set (match_dup 3)
+		   (ashift:HI (match_dup 3)
+			      (const_int 7)))
+	      (clobber (scratch:QI))])
+   (set (match_dup 0)
+	(ior:SI (ashift:SI (match_dup 1)
+			   (const_int 16))
+		(match_dup 0)))]
+  "operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));")
+
+(define_split
+  [(parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+	  (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "")
+			     (const_int 23))
+		  (match_dup 0)))
+     (clobber (match_operand:SI 2 "register_operand" ""))])]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && flow2_completed
+   && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1]))
+        && REGNO (operands[0]) != REGNO (operands[1]))"
+  [(set (match_dup 2)
+	(match_dup 1))
+   (parallel [(set (match_dup 3)
+		   (ashift:HI (match_dup 3)
+			      (const_int 7)))
+	      (clobber (scratch:QI))])
+   (set (match_dup 0)
+	(ior:SI (ashift:SI (match_dup 2)
+			   (const_int 16))
+		(match_dup 0)))]
+  "operands[3] = gen_rtx_REG (HImode, REGNO (operands[2]));")
+
+;; Used to add the exponent of a float.
+
+(define_insn "*addsi3_shift"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
+			  (const_int 8388608))
+		 (match_operand:SI 2 "register_operand" "0")))
+   (clobber (match_scratch:SI 3 "=&r"))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "#")
+
+(define_split
+  [(parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+	  (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "")
+			    (const_int 8388608))
+		   (match_dup 0)))
+     (clobber (match_operand:SI 2 "register_operand" ""))])]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && flow2_completed
+   && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))
+   && REGNO (operands[0]) != REGNO (operands[1])"
+  [(parallel [(set (match_dup 3)
+		   (ashift:HI (match_dup 3)
+			      (const_int 7)))
+	      (clobber (scratch:QI))])
+   (set (match_dup 0)
+	(plus:SI (mult:SI (match_dup 1)
+			  (const_int 65536))
+		 (match_dup 0)))]
+  "operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));")
+
+(define_split
+  [(parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+	  (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "")
+			    (const_int 8388608))
+		   (match_dup 0)))
+     (clobber (match_operand:SI 2 "register_operand" ""))])]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && flow2_completed
+   && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1]))
+        && REGNO (operands[0]) != REGNO (operands[1]))"
+  [(set (match_dup 2)
+	(match_dup 1))
+   (parallel [(set (match_dup 3)
+		   (ashift:HI (match_dup 3)
+			      (const_int 7)))
+	      (clobber (scratch:QI))])
+   (set (match_dup 0)
+	(plus:SI (mult:SI (match_dup 2)
+			  (const_int 65536))
+		 (match_dup 0)))]
+  "operands[3] = gen_rtx_REG (HImode, REGNO (operands[2]));")
+
 ;; xor:HI
 
 (define_insn "*xorhi3_zextqi"