From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 2 Mar 2013 13:34:00 +0000 (+0100)
Subject: subcircuit library: implied allExtern for mining
X-Git-Tag: yosys-0.2.0~763
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8689f5d339c31b542d94ef52c856c3a3938c750c;p=yosys.git

subcircuit library: implied allExtern for mining
---

diff --git a/libs/subcircuit/README b/libs/subcircuit/README
index d1bdb1f64..a2467f6a2 100644
--- a/libs/subcircuit/README
+++ b/libs/subcircuit/README
@@ -333,10 +333,6 @@ at most maxNodes nodes that occurs at least minMatches times:
 	std::vector<SubCircuit::Solver::MineResult> results;
 	mySolver.mine(results, minNodes, maxNodes, minMatches);
 
-The miner works by finding frequent pairs of nodes and then combining them
-to larger subcircuits. Because of this incremental strategy the miner only
-works as expected on graphs with markAllExtern() set.
-
 The mine() method has an optional fifth parameter that limits the number
 of matches counted in one graph. This can be useful when mining for circuits
 that are found in at least a number of graphs. E.g. the following call
diff --git a/libs/subcircuit/subcircuit.cc b/libs/subcircuit/subcircuit.cc
index a55b97ab4..b31c45e1d 100644
--- a/libs/subcircuit/subcircuit.cc
+++ b/libs/subcircuit/subcircuit.cc
@@ -1155,7 +1155,6 @@ class SubCircuit::SolverWorker
 		for (auto &it : graphData)
 		{
 			GraphData &haystack = it.second;
-			assert(haystack.graph.allExtern);
 
 			std::vector<std::set<int>> enumerationMatrix;
 			std::map<std::string, std::set<std::string>> initialMappings;
@@ -1176,6 +1175,7 @@ class SubCircuit::SolverWorker
 		for (int nodeIdx : testSet.nodes)
 			needle_nodes.push_back(graph.nodes[nodeIdx].nodeId);
 		needle.graph = Graph(graph, needle_nodes);
+		needle.graph.markAllExtern();
 		diCache.add(needle.graph, needle.adjMatrix, graphId, userSolver);
 
 		std::vector<Solver::Result> ullmannResults;
diff --git a/libs/subcircuit/test_mine.txt b/libs/subcircuit/test_mine.txt
index e3b9170b7..b200e47d9 100644
--- a/libs/subcircuit/test_mine.txt
+++ b/libs/subcircuit/test_mine.txt
@@ -7,7 +7,9 @@ graph macc22
 	node add_1 add A 32 B 32 Y 32
 	connect mul_1 Y add_1 A
 	connect mul_2 Y add_1 B
-	allextern
+	extern mul_1 A B
+	extern mul_2 A B
+	extern add_1 Y
 endgraph
 
 graph macc4x2
@@ -24,7 +26,11 @@ graph macc4x2
 	connect mul_4 Y add_2 B
 	connect add_1 Y add_3 A
 	connect add_2 Y add_3 B
-	allextern
+	extern mul_1 A B
+	extern mul_2 A B
+	extern mul_3 A B
+	extern mul_4 A B
+	extern add_3 Y
 endgraph
 
 swapgroup mul A B