From: Rene de Jong <rene.dejong@arm.com>
Date: Tue, 26 Mar 2013 18:46:51 +0000 (-0400)
Subject: mem: Cancel cache retry event when blocking port
X-Git-Tag: stable_2013_06_16~29
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=87089175ccdbec433668765b32b608fe266b7ebf;p=gem5.git

mem: Cancel cache retry event when blocking port

This patch solves the corner case scenario where the sendRetryEvent could be
scheduled twice, when an io device stresses the IOcache in the system. This
should not be possible in the cache system.
---

diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 476c086ed..85265b61e 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012 ARM Limited
+ * Copyright (c) 2012-2013 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -88,6 +88,13 @@ BaseCache::CacheSlavePort::setBlocked()
     assert(!blocked);
     DPRINTF(CachePort, "Cache port %s blocking new requests\n", name());
     blocked = true;
+    // if we already scheduled a retry in this cycle, but it has not yet
+    // happened, cancel it
+    if (sendRetryEvent.scheduled()) {
+       owner.deschedule(sendRetryEvent);
+       DPRINTF(CachePort, "Cache port %s deschedule retry\n", name());
+       mustSendRetry = true;
+    }
 }
 
 void