From: Jacob Lifshay <programmerjake@gmail.com>
Date: Wed, 24 May 2023 02:24:34 +0000 (-0700)
Subject: add support for adding extra uninit_regs from html comment
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=870f7f232;p=openpower-isa.git

add support for adding extra uninit_regs from html comment

I chose an html comment since it's not part of the proposed pseudocode

like so:
* blah RT,RA
Pseudo-code:

<!-- EXTRA_UNINIT_REGS: RT -->
    if rand() then
        RT <- 42 + (RA)
---

diff --git a/src/openpower/decoder/pseudo/pagereader.py b/src/openpower/decoder/pseudo/pagereader.py
index 71301f2f..b2fca28e 100644
--- a/src/openpower/decoder/pseudo/pagereader.py
+++ b/src/openpower/decoder/pseudo/pagereader.py
@@ -45,12 +45,14 @@ this translates to:
 """
 
 from openpower.util import log
+from openpower.decoder.orderedset import OrderedSet
 from collections import namedtuple, OrderedDict
 from copy import copy
 import os
 import re
 
-opfields = ("desc", "form", "opcode", "regs", "pcode", "sregs", "page")
+opfields = ("desc", "form", "opcode", "regs", "pcode", "sregs", "page",
+            "extra_uninit_regs")
 Ops = namedtuple("Ops", opfields)
 
 
@@ -302,6 +304,8 @@ class ISA:
                 print(repr(l))
             assert len(l) == 0, ("blank line not found %s" % l)
 
+            extra_uninit_regs = OrderedSet()
+
             # get pseudocode
 
             # fix parser line numbers by prepending the right number of
@@ -314,6 +318,13 @@ class ISA:
                 if len(l) == 0:
                     li.append(l)
                     break
+                re_match = re.fullmatch(r" *<!-- EXTRA_UNINIT_REGS:(.*)-->", l)
+                if re_match:
+                    for i in re_match[1].split(' '):
+                        if i != "":
+                            extra_uninit_regs.add(i)
+                    li.append("")
+                    continue
                 if l.strip().startswith('<!--'):
                     li.append("")
                     continue
@@ -321,6 +332,7 @@ class ISA:
                 l = l[4:]  # lose 4 spaces
                 li.append(l)
             d['pcode'] = li
+            d['extra_uninit_regs'] = extra_uninit_regs
 
             # "Special Registers Altered" expected
             l = lines.pop(0).rstrip()
diff --git a/src/openpower/decoder/pseudo/pywriter.py b/src/openpower/decoder/pseudo/pywriter.py
index b2f39186..a45ca079 100644
--- a/src/openpower/decoder/pseudo/pywriter.py
+++ b/src/openpower/decoder/pseudo/pywriter.py
@@ -82,6 +82,7 @@ class PyISAWriter(ISA):
                 filename = os.path.join(get_isa_dir(), pagename + ".mdwn")
                 pycode, rused = convert_to_python(pcode, d.form, incl_carry,
                                                   filename=filename)
+                rused['uninit_regs'] |= d.extra_uninit_regs
                 # create list of arguments to call
                 regs = list(rused['read_regs']) + list(rused['uninit_regs'])
                 regs += list(rused['special_regs'])