From: lkcl <lkcl@web>
Date: Sun, 17 Jan 2021 14:46:20 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~433
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8765b3c2dc62bd46560a22b880d1f8324a0e27e5;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index fc88baf2e..acf728cb8 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -192,6 +192,8 @@ another mode selection would be CRs not Ints.
 # bitmask set
 
 based on RV bitmanip singlebit set, instruction format similar to shift
+[[isa/fixedshift]].  bmext is actually covered already (shift-with-mask).
+however bitmask-invert is not, and set/clr are not covered, although they can ise the same Shift ALU.
 
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