From: Dmitry Selyutin Date: Fri, 20 Oct 2023 17:15:12 +0000 (+0300) Subject: isa/caller: refactor sc logic X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=87c9811a915b735efd6591b36c83d184d4943441;p=openpower-isa.git isa/caller: refactor sc logic --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 0c9b0e60..84456c26 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1957,18 +1957,6 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): log("call", ins_name, asmop, kind=LogKind.InstrInOuts) - if asmop in ("sc", "scv"): - if self.syscall is not None: - identifier = self.gpr(0) - arguments = map(self.gpr, range(3, 9)) - result = self.syscall(identifier, *arguments) - self.gpr.write(3, result, False, self.namespace["XLEN"]) - self.update_pc_next() - return - else: - self.call_trap(0x700, PIb.ILLEG) - return - # sv.setvl is *not* a loop-function. sigh log("is_svp64_mode", self.is_svp64_mode, asmop) @@ -2065,6 +2053,13 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): self.update_pc_next() return + # Usermode system call emulation + if asmop in ("sc", "scv") and self.syscall is not None: + identifier = self.gpr(0) + arguments = map(self.gpr, range(3, 9)) + result = self.syscall(identifier, *arguments) + self.gpr.write(3, result, False, self.namespace["XLEN"]) + # get elwidths, defaults to 64 xlen = 64 ew_src = 64