From: Andrew Zonenberg Date: Sat, 2 Apr 2016 06:39:32 +0000 (-0700) Subject: Removed forgotten debug code X-Git-Tag: yosys-0.7~270^2~1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=87e7cd9fbd6e603da262e68f7ec68eb0d7233c2c;p=yosys.git Removed forgotten debug code --- diff --git a/techlibs/greenpak4/greenpak4_counters.cc b/techlibs/greenpak4/greenpak4_counters.cc index 49f93bbed..97a157951 100644 --- a/techlibs/greenpak4/greenpak4_counters.cc +++ b/techlibs/greenpak4/greenpak4_counters.cc @@ -347,8 +347,6 @@ void greenpak4_counters_worker( log_id(extract.rwire->name), count_reg_src.c_str()); - log("blah"); - //Wipe all of the old connections to the ALU cell->unsetPort("\\A"); cell->unsetPort("\\B"); @@ -362,9 +360,7 @@ void greenpak4_counters_worker( cell->unsetParam("\\B_SIGNED"); cell->unsetParam("\\B_WIDTH"); cell->unsetParam("\\Y_WIDTH"); - - log("asdf"); - + //Change the cell type cell->type = celltype; @@ -382,8 +378,6 @@ void greenpak4_counters_worker( cell->setPort("\\RST", RTLIL::SigSpec(false)); } - log("world"); - //Hook up other stuff cell->setParam("\\CLKIN_DIVIDE", RTLIL::Const(1)); cell->setParam("\\COUNT_TO", RTLIL::Const(extract.count_value));