From: lkcl <lkcl@web>
Date: Thu, 3 Jun 2021 11:32:28 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~841
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=87e7f1d974750443af96af1f961af71a36050f2e;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index d35e8c728..4faf14df3 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -149,6 +149,13 @@ the top bit FI0 (MSB0 numbered 0) makes 16.
 
 <div id="fpr-to-gpr-conversion-mode"></div>
 
+X-Form:
+
+|  0-5   | 6-10 | 11-15  | 16-25 | 26-30 | 31 |
+|--------|------|--------|-------|-------|----|
+|  Major | RT   | //Mode | FRA   | XO    | Rc |
+|  Major | FRT  | //Mode | RA    | XO    | Rc |
+
 Mode values:
 
 | Mode | `rounding_mode` | Semantics                        |