From: Uros Bizjak <uros@gcc.gnu.org>
Date: Wed, 27 Jan 2016 17:08:00 +0000 (+0100)
Subject: re PR target/69512 (ICE when using avx with i586)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=87ff4d664cee24c5e3070bd573f501bb982ee862;p=gcc.git

re PR target/69512 (ICE when using avx with i586)

2016-01-27  Uros Bizjak  <ubizjak@gmail.com>

	PR target/69512
	* config/i386/i386.md (*zext<mode>_doubleword_and): New pattern.
	(*zext<mode>_doubleword): Disable for TARGET_ZERO_EXTEND_WITH_AND.

testsuite/ChangeLog:

2016-01-27  Uros Bizjak  <ubizjak@gmail.com>

	PR target/69512
	* gcc.target/i386/pr69512.c: New test.

From-SVN: r232885
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e5f1701a8e9..ea590888d41 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-01-27  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/69512
+	* config/i386/i386.md (*zext<mode>_doubleword_and): New pattern.
+	(*zext<mode>_doubleword): Disable for TARGET_ZERO_EXTEND_WITH_AND.
+
 2016-01-27  Thomas Klausner  <wiz@NetBSD.org>
 
 	PR target/68380
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f16b42ab884..79c5f1a740c 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3874,10 +3874,29 @@
   [(set_attr "type" "imovx")
    (set_attr "mode" "SI")])
 
+(define_insn_and_split "*zext<mode>_doubleword_and"
+  [(set (match_operand:DI 0 "register_operand" "=&<r>")
+	(zero_extend:DI (match_operand:SWI12 1 "nonimmediate_operand" "<r>m")))]
+  "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
+   && TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)"
+  "#"
+  "&& reload_completed && GENERAL_REG_P (operands[0])"
+  [(set (match_dup 2) (const_int 0))]
+{
+  split_double_mode (DImode, &operands[0], 1, &operands[0], &operands[2]);
+
+  emit_move_insn (operands[0], const0_rtx);
+
+  gcc_assert (!TARGET_PARTIAL_REG_STALL);
+  emit_insn (gen_movstrict<mode>
+	     (gen_lowpart (<MODE>mode, operands[0]), operands[1]));
+})
+
 (define_insn_and_split "*zext<mode>_doubleword"
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI (match_operand:SWI12 1 "nonimmediate_operand" "<r>m")))]
-  "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
+  "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
+   && !(TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))"
   "#"
   "&& reload_completed && GENERAL_REG_P (operands[0])"
   [(set (match_dup 0) (zero_extend:SI (match_dup 1)))
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 94659a28fe5..a7b0452cc0c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-27  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/69512
+	* gcc.target/i386/pr69512.c: New test.
+
 2016-01-27  Rainer Emrich  <rainer@emrich-ebersheim.de>
 
 	PR ada/69488
@@ -55,7 +60,7 @@
 	* gcc.dg/autopar/pr69110.c: New test.
 
 2016-01-26  Abderrazek Zaafrani  <a.zaafrani@samsung.com>
-            Sebastian Pop  <s.pop@samsung.com>
+	    Sebastian Pop  <s.pop@samsung.com>
 
 	* gcc.dg/graphite/isl-ast-op-select.c: New.
 
diff --git a/gcc/testsuite/gcc.target/i386/pr69512.c b/gcc/testsuite/gcc.target/i386/pr69512.c
new file mode 100644
index 00000000000..4147e663ef6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr69512.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-march=i586 -mavx -O2" } */
+
+extern double s1[];
+extern double s2[];
+extern long long e[];
+
+void test (void)
+{
+  int i;
+
+  for (i = 0; i < 2; i++)
+    e[i] = !__builtin_isunordered(s1[i], s2[i]) && s1[i] != s2[i] ? -1 : 0;
+}