From: Alyssa Rosenzweig Date: Wed, 24 Jul 2019 20:29:36 +0000 (-0700) Subject: pan/midgard: Move uniforms to special registers X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8842db3a7df233406520dc34affb7b68e6c1eff5;p=mesa.git pan/midgard: Move uniforms to special registers The load/store pipes can't take a uniform register in, so an explicit move is necessary here. Signed-off-by: Alyssa Rosenzweig --- diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h index 8b91a63e82e..abe8b3e90c5 100644 --- a/src/panfrost/midgard/compiler.h +++ b/src/panfrost/midgard/compiler.h @@ -375,6 +375,7 @@ void mir_rewrite_index_dst(compiler_context *ctx, unsigned old, unsigned new); void mir_rewrite_index_src_single(midgard_instruction *ins, unsigned old, unsigned new); void mir_rewrite_index_src_tag(compiler_context *ctx, unsigned old, unsigned new, unsigned tag); bool mir_single_use(compiler_context *ctx, unsigned value); +bool mir_special_index(compiler_context *ctx, unsigned idx); /* MIR printing */ diff --git a/src/panfrost/midgard/mir.c b/src/panfrost/midgard/mir.c index 93262f4b13f..1be224b8464 100644 --- a/src/panfrost/midgard/mir.c +++ b/src/panfrost/midgard/mir.c @@ -125,4 +125,22 @@ mir_nontrivial_source2_mod(midgard_instruction *ins) return mir_nontrivial_mod(src2, is_int, ins->mask); } +/* Checks if an index will be used as a special register -- basically, if we're + * used as the input to a non-ALU op */ +bool +mir_special_index(compiler_context *ctx, unsigned idx) +{ + mir_foreach_instr_global(ctx, ins) { + bool is_ldst = ins->type == TAG_LOAD_STORE_4; + bool is_tex = ins->type == TAG_TEXTURE_4; + + if (!(is_ldst || is_tex)) + continue; + + if (mir_has_arg(ins, idx)) + return true; + } + + return false; +} diff --git a/src/panfrost/midgard/mir_promote_uniforms.c b/src/panfrost/midgard/mir_promote_uniforms.c index 227b943a8f9..b494d3b5b2f 100644 --- a/src/panfrost/midgard/mir_promote_uniforms.c +++ b/src/panfrost/midgard/mir_promote_uniforms.c @@ -69,9 +69,13 @@ midgard_promote_uniforms(compiler_context *ctx, unsigned register_pressure) ctx->uniform_cutoff = MAX2(ctx->uniform_cutoff, address + 1); unsigned promoted = SSA_FIXED_REGISTER(uniform_reg); - /* We do need the move for safety for a non-SSA dest */ + /* We do need the move for safety for a non-SSA dest, or if + * we're being fed into a special class */ - if (ins->ssa_args.dest >= ctx->func->impl->ssa_alloc) { + bool needs_move = ins->ssa_args.dest >= ctx->func->impl->ssa_alloc; + needs_move |= mir_special_index(ctx, ins->ssa_args.dest); + + if (needs_move) { midgard_instruction mov = v_mov(promoted, blank_alu_src, ins->ssa_args.dest); mir_insert_instruction_before(ins, mov); } else {