From: Richard Sandiford Date: Tue, 24 Aug 2004 20:04:57 +0000 (+0000) Subject: mips.c (mips_gen_conditional_trap): Fix mode. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=886ce862cb96d58a91700af29baea916af2aae35;p=gcc.git mips.c (mips_gen_conditional_trap): Fix mode. * config/mips/mips.c (mips_gen_conditional_trap): Fix mode. * config/mips/mips.md (*conditional_trap[sd]i): Name previously unnamed patterns. Redefine using :GPR. Give the match_operator a mode. Use '%2' rather than '%z2' for operand 2. From-SVN: r86511 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4af8dcfc48f..31adda24fe3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-08-24 Richard Sandiford + + * config/mips/mips.c (mips_gen_conditional_trap): Fix mode. + * config/mips/mips.md (*conditional_trap[sd]i): Name previously unnamed + patterns. Redefine using :GPR. Give the match_operator a mode. + Use '%2' rather than '%z2' for operand 2. + 2004-08-24 Richard Sandiford * config/mips/mips.md (load_call[sd]i): Redefine using :P. Add mode diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 5067324a05e..9f0bf68fade 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -2578,20 +2578,20 @@ mips_gen_conditional_trap (rtx *operands) } if (cmp_code == GET_CODE (operands[0])) { - op0 = force_reg (mode, cmp_operands[0]); + op0 = cmp_operands[0]; op1 = cmp_operands[1]; } else { - op0 = force_reg (mode, cmp_operands[1]); + op0 = cmp_operands[1]; op1 = cmp_operands[0]; } - if (GET_CODE (op1) == CONST_INT && ! SMALL_INT (op1)) + op0 = force_reg (mode, op0); + if (!arith_operand (op1, mode)) op1 = force_reg (mode, op1); emit_insn (gen_rtx_TRAP_IF (VOIDmode, - gen_rtx_fmt_ee (cmp_code, GET_MODE (operands[0]), - op0, op1), + gen_rtx_fmt_ee (cmp_code, mode, op0, op1), operands[1])); } diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 251ec685700..46ec8cf1be1 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -396,7 +396,7 @@ else return "break"; } - [(set_attr "type" "trap")]) + [(set_attr "type" "trap")]) (define_expand "conditional_trap" [(trap_if (match_operator 0 "comparison_operator" @@ -404,7 +404,8 @@ (match_operand 1 "const_int_operand"))] "ISA_HAS_COND_TRAP" { - if (operands[1] == const0_rtx) + if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) == MODE_INT + && operands[1] == const0_rtx) { mips_gen_conditional_trap (operands); DONE; @@ -413,23 +414,14 @@ FAIL; }) -(define_insn "" - [(trap_if (match_operator 0 "trap_comparison_operator" - [(match_operand:SI 1 "reg_or_0_operand" "dJ") - (match_operand:SI 2 "arith_operand" "dI")]) +(define_insn "*conditional_trap" + [(trap_if (match_operator:GPR 0 "trap_comparison_operator" + [(match_operand:GPR 1 "reg_or_0_operand" "dJ") + (match_operand:GPR 2 "arith_operand" "dI")]) (const_int 0))] "ISA_HAS_COND_TRAP" - "t%C0\t%z1,%z2" - [(set_attr "type" "trap")]) - -(define_insn "" - [(trap_if (match_operator 0 "trap_comparison_operator" - [(match_operand:DI 1 "reg_or_0_operand" "dJ") - (match_operand:DI 2 "arith_operand" "dI")]) - (const_int 0))] - "TARGET_64BIT && ISA_HAS_COND_TRAP" - "t%C0\t%z1,%z2" - [(set_attr "type" "trap")]) + "t%C0\t%z1,%2" + [(set_attr "type" "trap")]) ;; ;; .................... diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3bf74a06ffe..c49b14902ba 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2004-08-24 Richard Sandiford + + * gcc.c-torture/compile/iftrap-3.c: New test. + 2004-08-24 Paul Brook * gfortran.dg/entry_2.f90: New test. diff --git a/gcc/testsuite/gcc.c-torture/compile/iftrap-3.c b/gcc/testsuite/gcc.c-torture/compile/iftrap-3.c new file mode 100644 index 00000000000..52278e145db --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/iftrap-3.c @@ -0,0 +1,4 @@ +/* Check that the conditional_trap pattern handles floating-point + comparisons correctly. */ +void f1 (float x, float y) { if (x == y) __builtin_trap (); } +void f2 (double x, double y) { if (x == y) __builtin_trap (); }