From: Daniel R. Carvalho <odanrc@yahoo.com.br>
Date: Thu, 31 May 2018 10:09:39 +0000 (+0200)
Subject: mem-cache: Fix secure bit modification
X-Git-Tag: v19.0.0.0~2090
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=888bdb67e181710283372ae1a74698e216ee3ac2;p=gem5.git

mem-cache: Fix secure bit modification

Secure bit was being updated outside insertion.

Change-Id: I83d9b010e8cf64013bbea9bae3ea68b0c414a189
Reviewed-on: https://gem5-review.googlesource.com/10622
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
---

diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index e6315cf04..604aab621 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -1136,14 +1136,13 @@ BaseCache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
     } else {
         // existing block... probably an upgrade
         assert(blk->tag == tags->extractTag(addr));
+        assert(blk->isSecure() == is_secure);
         // either we're getting new data or the block should already be valid
         assert(pkt->hasData() || blk->isValid());
         // don't clear block status... if block is already dirty we
         // don't want to lose that
     }
 
-    if (is_secure)
-        blk->status |= BlkSecure;
     blk->status |= BlkValid | BlkReadable;
 
     // sanity check for whole-line writes, which should always be
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 5034ca521..9177ebea8 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -887,7 +887,6 @@ Cache::cleanEvictBlk(CacheBlk *blk)
     return pkt;
 }
 
-
 /////////////////////////////////////////////////////
 //
 // Snoop path: requests coming in from the memory side