From: lkcl <lkcl@web>
Date: Tue, 28 Jun 2022 04:29:00 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1486
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8897ca4f9a8c4baea4aedbec363e95797010a630;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 75edd273c..cc3030ea1 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -163,10 +163,10 @@ Conditional:
 
 | 4 | 5 | 6 | 7 | 17 | 18 | 19 | 20 |  21 | 22  23 |  description     |
 | - | - | - | - | -- | -- | -- | -- | --- |--------|----------------- |
-|ALL|SNZ| / | / |    |    | 0  | 0  | /   | LRu sz | normal mode      |
-|ALL|SNZ| / |VSb|    |    | 0  | 1  | VLI | LRu sz | VLSET mode       |
-|ALL|SNZ|CTi| / |    |    | 1  | 0  | /   | LRu sz | CTR-test mode         |
-|ALL|SNZ|CTi|VSb|    |    | 1  | 1  | VLI | LRu sz | CTR-test+VLSET mode   |
+|ALL|SNZ| / | / | SL |SLu | 0  | 0  | /   | LRu sz | normal mode      |
+|ALL|SNZ| / |VSb| SL |SLu | 0  | 1  | VLI | LRu sz | VLSET mode       |
+|ALL|SNZ|CTi| / | SL |SLu | 1  | 0  | /   | LRu sz | CTR-test mode         |
+|ALL|SNZ|CTi|VSb| SL |SLu | 1  | 1  | VLI | LRu sz | CTR-test+VLSET mode   |
 
 TODO bits 17,18 for SVSTATE-variant of LR and LRu.