From: lkcl <lkcl@web>
Date: Sun, 21 Aug 2022 16:33:46 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~805
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=88a535d41ecb576397c17dc3a3bfe58604194923;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index bf38b6632..3d7cf2887 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -15,7 +15,7 @@ Links:
 
 All Vector ISAs dating back fifty years have extensive and comprehensive
 Load and Store operations that go far beyond the capabilities of Scalar
-RISC or CISC processors, yet at their heart on an individual element
+RISC and most CISC processors, yet at their heart on an individual element
 basis may be found to be no different from RISC Scalar equivalents.
 
 The resource savings from Vector LD/ST are significant and stem from