From: bugzilla-daemon Date: Fri, 8 May 2020 14:36:36 +0000 (+0000) Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=88bafbf3662e718f56994a10e0622bc4674ff629;p=libre-riscv-dev.git [libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC --- diff --git a/a9/baa05c7941508b6dc5790d9afcc299de5db67e b/a9/baa05c7941508b6dc5790d9afcc299de5db67e new file mode 100644 index 0000000..c2dd2bf --- /dev/null +++ b/a9/baa05c7941508b6dc5790d9afcc299de5db67e @@ -0,0 +1,73 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 08 May 2020 15:36:38 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jX47C-000652-0M; Fri, 08 May 2020 15:36:38 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1jX47A-00064t-5M + for libre-riscv-dev@lists.libre-riscv.org; Fri, 08 May 2020 15:36:36 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 08 May 2020 14:36:36 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: yimmanuel3@gatech.edu +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: cc bug_file_loc +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for + 180nm ASIC +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTMwNAoKWWVob3dzaHVh +IDx5aW1tYW51ZWwzQGdhdGVjaC5lZHU+IGNoYW5nZWQ6CgogICAgICAgICAgIFdoYXQgICAgfFJl +bW92ZWQgICAgICAgICAgICAgICAgICAgICB8QWRkZWQKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQogICAg +ICAgICAgICAgICAgIENDfCAgICAgICAgICAgICAgICAgICAgICAgICAgICB8eWltbWFudWVsM0Bn +YXRlY2guZWR1CiAgICAgICAgICAgICAgICBVUkx8ICAgICAgICAgICAgICAgICAgICAgICAgICAg +IHxodHRwOi8vbGlzdHMubGlicmUtcmlzY3Yub3IKICAgICAgICAgICAgICAgICAgIHwgICAgICAg +ICAgICAgICAgICAgICAgICAgICAgfGcvcGlwZXJtYWlsL2xpYnJlLXJpc2N2LWRldgogICAgICAg +ICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgICAgICAgICAgICB8LzIwMjAtTWF5LzAwNjM3 +NC5odG1sCgotLS0gQ29tbWVudCAjMSBmcm9tIFllaG93c2h1YSA8eWltbWFudWVsM0BnYXRlY2gu +ZWR1PiAtLS0KT2gsIG15IGJhZCBJJ20ganVzdCBub3cgc2VlaW5nIHRoaXMuCgpSZWxlYQoKLS0g +CllvdSBhcmUgcmVjZWl2aW5nIHRoaXMgbWFpbCBiZWNhdXNlOgpZb3UgYXJlIG9uIHRoZSBDQyBs +aXN0IGZvciB0aGUgYnVnLgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f +X19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFpbGluZyBsaXN0CmxpYnJlLXJpc2N2LWRldkBsaXN0 +cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xpc3RzLmxpYnJlLXJpc2N2Lm9yZy9tYWlsbWFuL2xp +c3RpbmZvL2xpYnJlLXJpc2N2LWRldgo= +