From: lkcl <lkcl@web>
Date: Mon, 27 Mar 2023 09:45:04 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls001_v3~34
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=88f8a70358fdbaff83137696d2b7a98b375feddb;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn
index 6e80dfc35..d4a10b97e 100644
--- a/openpower/sv/rfc/ls009.mdwn
+++ b/openpower/sv/rfc/ls009.mdwn
@@ -489,7 +489,7 @@ In short, there exists solutions to the problem of Hazard Management,
 with varying degrees of refinement possible at correspondingly
 increasing levels of complexity in hardware.
 
-## REMAP area of SVSTATE
+## REMAP area of SVSTATE SPR
 
 The following bits of the SVSTATE SPR are used for REMAP:
 
@@ -503,13 +503,16 @@ likewise mo0-1 apply to output registers (RT/FRT, RS/FRS) respectively.
 SVme is 5 bits (one for each of mi0-2/mo0-1) and indicates whether the
 SVSHAPE is actively applied or not.
 
-* bit 0 of SVme indicates if mi0 is applied to RA / FRA
-* bit 1 of SVme indicates if mi1 is applied to RB / FRB
-* bit 2 of SVme indicates if mi2 is applied to RC / FRC
-* bit 3 of SVme indicates if mo0 is applied to RT / FRT
+* bit 0 of SVme indicates if mi0 is applied to RA / FRA / BA / BFA
+* bit 1 of SVme indicates if mi1 is applied to RB / FRB / BB
+* bit 2 of SVme indicates if mi2 is applied to RC / FRC / BC
+* bit 3 of SVme indicates if mo0 is applied to RT / FRT / BT / BF
 * bit 4 of SVme indicates if mo1 is applied to Effective Address / FRS / RS
   (LD/ST-with-update has an implicit 2nd write register, RA)
 
+The "persistence" bit if set will result in all Active REMAPs being applied
+indefinitely.
+
 # svremap instruction <a name="svremap"> </a>
 
 SVRM-Form:
@@ -551,6 +554,22 @@ explicitly disabled, either by `setvl` setting a new MAXVL, or with another
 clearing persistence, as well as partially covering a subset of the capability of
 `svremap` to set register-to-SVSHAPE relationships.
 
+Programmer's Note: applying non-persistent `svremap` to an instruction that has
+no REMAP enabled or is a Scalar operation will obviously have no effect but
+the bits 32 to 46 will at least have been set in SVSTATE. This may prove useful
+when using `svindex` or `svshape2`.
+
+Hardware Architectural Note: when persistence is not set it is critically important
+to treat the `svremap` and the following SVP64 instruction as an indivisible fused operation.
+*No state* is stored in the SVSTATE SPR in order to allow continuation should an
+Interrupt occur between the two instructions. Thus, Interrupts must be prohibited
+from occurring or other workaround deployed.  When persistence is set this issue
+is moot.
+
+It is critical to note that if persistence is clear `svremap` is the **only** way
+to activate REMAP on any given (following) instruction.  If persistence is set however then
+**all** SVP64 instructions go through REMAP as long as `SVme` is non-zero.
+
 -------------
 
 \newpage{}