From: Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
Date: Mon, 9 May 2016 16:56:30 +0000 (+0000)
Subject: rs6000.c (rs6000_reassociation_width): Add function for TARGET_SCHED_REASSOCIATION_WI... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8964ed82dbf9554c07ba02f060a0b4ab7d17765c;p=gcc.git

rs6000.c (rs6000_reassociation_width): Add function for TARGET_SCHED_REASSOCIATION_WIDTH to enable parallel...

        * config/rs6000/rs6000.c (rs6000_reassociation_width): Add
        function for TARGET_SCHED_REASSOCIATION_WIDTH to enable
        parallel reassociation for power8 and forward.

From-SVN: r236043
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 007ae87711c..0cd95344f1b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-04  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
+
+        * config/rs6000/rs6000.c (rs6000_reassociation_width): Add
+        function for TARGET_SCHED_REASSOCIATION_WIDTH to enable
+        parallel reassociation for power8 and forward.
+
 2016-05-09  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.md (absneg splitters with general regs): Use
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 368fec2b3c8..34495f3c99d 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1755,6 +1755,9 @@ static const struct attribute_spec rs6000_attribute_table[] =
 #undef TARGET_CONDITIONAL_REGISTER_USAGE
 #define TARGET_CONDITIONAL_REGISTER_USAGE rs6000_conditional_register_usage
 
+#undef TARGET_SCHED_REASSOCIATION_WIDTH
+#define TARGET_SCHED_REASSOCIATION_WIDTH rs6000_reassociation_width
+
 #undef TARGET_TRAMPOLINE_INIT
 #define TARGET_TRAMPOLINE_INIT rs6000_trampoline_init
 
@@ -8633,6 +8636,40 @@ rs6000_offsettable_memref_p (rtx op, machine_mode reg_mode)
 					     true, worst_case);
 }
 
+/* Determine the reassociation width to be used in reassociate_bb.
+   This takes into account how many parallel operations we
+   can actually do of a given type, and also the latency.
+   P8:
+     int add/sub 6/cycle     
+         mul 2/cycle
+     vect add/sub/mul 2/cycle
+     fp   add/sub/mul 2/cycle
+     dfp  1/cycle
+*/
+ 
+static int
+rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
+                            enum machine_mode mode)
+{
+  switch (rs6000_cpu)
+    {
+    case PROCESSOR_POWER8:
+    case PROCESSOR_POWER9:
+      if (DECIMAL_FLOAT_MODE_P (mode))
+	return 1;
+      if (VECTOR_MODE_P (mode))
+	return 4;
+      if (INTEGRAL_MODE_P (mode)) 
+	return opc == MULT_EXPR ? 4 : 6;
+      if (FLOAT_MODE_P (mode))
+	return 4;
+      break;
+    default:
+      break;
+    }
+  return 1;
+}
+
 /* Change register usage conditional on target flags.  */
 static void
 rs6000_conditional_register_usage (void)