From: Shriya Sharma Date: Fri, 27 Oct 2023 10:46:18 +0000 (+0100) Subject: added english language description for lhbrsx instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8969803ba36cd0e055df0f669cd652f7bf1e4cea;p=openpower-isa.git added english language description for lhbrsx instruction --- diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index 4423123a..1935e59f 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -356,11 +356,13 @@ Description: Let the effective address (EA) be the sum of the contents of register RB shifted by (SH+1), and (RA|0). - The doubleword in storage addressed by EA is loaded into RT. - - EA is placed into register RA. - - If RA=0 or RA=RT, the instruction form is invalid. + Bits 0:7 of the word in storage addressed + by EA are loaded into RT[56:63]. Bits 8:15 of the word in + storage addressed by EA are loaded into RT[48:55]. Bits + 16:23 of the word in storage addressed by EA are + loaded into RT[40:47]. Bits 24:31 of the word in storage + addressed by EA are loaded into RT 32:39. + RT[0:31] are set to 0. Special Registers Altered: