From: Luke Kenneth Casson Leighton Date: Sun, 15 Mar 2020 19:57:52 +0000 (+0000) Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=89808885e4e0579eedffb2cffe33c331aad436ab;p=libre-riscv-dev.git Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility --- diff --git a/12/b0deab7902378ff77bcabf96e8c252bae0474a b/12/b0deab7902378ff77bcabf96e8c252bae0474a new file mode 100644 index 0000000..96f6766 --- /dev/null +++ b/12/b0deab7902378ff77bcabf96e8c252bae0474a @@ -0,0 +1,80 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Sun, 15 Mar 2020 19:58:28 +0000 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jDZP1-0000cd-NL; Sun, 15 Mar 2020 19:58:27 +0000 +Received: from lkcl.net ([217.147.94.29]) + by libre-riscv.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.89) (envelope-from ) id 1jDZOy-0000cX-Ky + for libre-riscv-dev@lists.libre-riscv.org; Sun, 15 Mar 2020 19:58:24 +0000 +DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lkcl.net; + s=201607131; + h=Content-Type:To:Subject:Message-ID:Date:From:In-Reply-To:References:MIME-Version; + bh=8zAhVRrf6AXBpNO+m0bgn9spV3laPz7QmMMv+E9L2ZA=; + b=GmlTog3medLMnA+U62V1pLdaJHlQg9xBJhL+rJ2N0u0CGVAFFUC2A5ZChU/lLI3koqMHiFViekeRAeMN4NiAFewGobLM9zCZYmtf7QuqW1xNZ7IMNyai6EsiVCBM4QS0yiamLhc6Cs4vGNdR3Tkrwr2/bqCDEObxAHoEzIfgW0g=; +Received: from mail-lf1-f53.google.com ([209.85.167.53]) + by lkcl.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.84_2) (envelope-from ) id 1jDZOy-0008Af-AF + for libre-riscv-dev@lists.libre-riscv.org; Sun, 15 Mar 2020 19:58:24 +0000 +Received: by mail-lf1-f53.google.com with SMTP id q10so12167361lfo.8 + for ; + Sun, 15 Mar 2020 12:58:08 -0700 (PDT) +X-Gm-Message-State: ANhLgQ1m71e8LTfFNYqJ6BIlItQM3Xx8NMMznkhNp95AAPVsmcIVOOH3 + dliizawIgq0RdcyQxBkx5BZ8VnqHu/24wDX/GbQ= +X-Google-Smtp-Source: ADFU+vsZjghicp/ggK1mlj7GyLHmHz2Fw/dkwyOPKJvf8JeLzlmRmAFuf+YL5CZLgoMmVBCFqK+yX1pFIYPF91s8CSc= +X-Received: by 2002:a19:4350:: with SMTP id m16mr6645061lfj.67.1584302283451; + Sun, 15 Mar 2020 12:58:03 -0700 (PDT) +MIME-Version: 1.0 +References: <6AC4EFD4-AA30-42C7-855A-CE68A62F107F@gatech.edu> + + <20200315051018.svaw4aor7ifwn725@topoi.pooq.com> + + + + <1BB9EA49-275B-4365-963E-9FC21D574BB7@gatech.edu> + <16F24775-E25B-4E31-A1D4-145EB65FB1D8@gatech.edu> + + <75CA4609-370F-455E-A88D-50E3766D45D7@gatech.edu> + + <884F8FEE-60FF-4580-A2E7-8AAA40A6DB6B@gatech.edu> + + <8C348DCE-274B-476B-8F61-C1BB5F1C3EC1@gatech.edu> +In-Reply-To: <8C348DCE-274B-476B-8F61-C1BB5F1C3EC1@gatech.edu> +From: Luke Kenneth Casson Leighton +Date: Sun, 15 Mar 2020 19:57:52 +0000 +X-Gmail-Original-Message-ID: +Message-ID: +To: Libre-RISCV General Development +Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture + feasibility +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +T24gU3VuLCBNYXIgMTUsIDIwMjAgYXQgNzo1MyBQTSBJbW1hbnVlbCwgWWVob3dzaHVhIFUKPHlp +bW1hbnVlbDNAZ2F0ZWNoLmVkdT4gd3JvdGU6Cgo+IEJ1dCB5ZWFoLCB0aGUgbWFpbiB0aG91Z2h0 +IGluIG15IGhlYWQgZm9yIHN0aWNraW5nIHdpdGggYSBzaW5nbGUgSVNBIGlzIHBvd2VyIGNvbnN1 +bXB0aW9uLgoKaXQncyBhbGwgYXQgdGhlIHRyYW5zbGF0aW9uIChkZWNvZGVyKSwgcGhhc2UsIHll +aG93c3VhLiAgIHRoZSBjaG9pY2UKb2YgSVNBIGlzIGEgMzNyZCBiaXQsIGFuZCBvbmNlIGRlY29k +ZWQgdG8gdGhhdCAiaW50ZXJuYWwiIGZvcm1hdCwKaXQncy4uLiBub3RoaW5nLgoKbC4KCl9fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpYnJlLXJpc2N2LWRl +diBtYWlsaW5nIGxpc3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwpodHRw +Oi8vbGlzdHMubGlicmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGluZm8vbGlicmUtcmlzY3YtZGV2 +Cg==