From: Andrew Stubbs Date: Tue, 19 Nov 2019 14:04:27 +0000 (+0000) Subject: Update loop-1.c test for amdgcn X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=89842a5104770789045e4a89fd9e0eaa31abf6a8;p=gcc.git Update loop-1.c test for amdgcn 2019-11-19 Andrew Stubbs gcc/testsuite/ * gcc.dg/tree-ssa/loop-1.c: Change amdgcn assembler scan. From-SVN: r278446 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2acd0bde8f8..878bc0219cb 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-11-19 Andrew Stubbs + + * gcc.dg/tree-ssa/loop-1.c: Change amdgcn assembler scan. + 2019-11-19 Richard Biener PR tree-optimization/92581 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c index 4b5a43457b0..39ee4dea883 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c @@ -45,8 +45,6 @@ int xxx(void) relaxation. */ /* CRIS and MSP430 keep the address in a register. */ /* m68k sometimes puts the address in a register, depending on CPU and PIC. */ -/* AMD GCN loads symbol addresses as hi/lo pairs, and then reuses that for - each jump. */ /* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* i?86-*-mingw* i?86-*-cygwin* x86_64-*-mingw* visium-*-* nvptx*-*-* pdp11*-*-* msp430-*-* amdgcn*-*-* } } } */ /* { dg-final { scan-assembler-times "foo,%r" 5 { target hppa*-*-* } } } */ @@ -58,5 +56,4 @@ int xxx(void) /* { dg-final { scan-assembler-times "\[jb\]sr" 5 { target fido-*-* m68k-*-* pdp11-*-* } } } */ /* { dg-final { scan-assembler-times "bra *tr,r\[1-9\]*,r21" 5 { target visium-*-* } } } */ /* { dg-final { scan-assembler-times "(?n)\[ \t\]call\[ \t\].*\[ \t\]foo," 5 { target nvptx*-*-* } } } */ -/* { dg-final { scan-assembler-times "add_u32\t\[sv\]\[0-9\]*, \[sv\]\[0-9\]*, foo@rel32@lo" 1 { target { amdgcn*-*-* } } } } */ /* { dg-final { scan-assembler-times "s_swappc_b64" 5 { target { amdgcn*-*-* } } } } */