From: Nicolas Pitre Date: Thu, 2 Aug 2018 16:50:07 +0000 (+0000) Subject: arm - correctly handle denormal results during softfp subtraction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=89fff9cc2bb4f789afe9d99986222e36f23c848b;p=gcc.git arm - correctly handle denormal results during softfp subtraction 2018-08-02 Nicolas Pitre PR libgcc/86512 * config/arm/ieee754-df.S (adddf3): Don't shortcut denormal handling when exponent goes negative. Update my email address. * config/arm/ieee754-sf.S (addsf3): Likewise. From-SVN: r263267 --- diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 4f8ddcef3c6..bfdda6e2283 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,10 @@ +2018-08-02 Nicolas Pitre + + PR libgcc/86512 + * config/arm/ieee754-df.S: Don't shortcut denormal handling when + exponent goes negative. Update my email address. + * config/arm/ieee754-sf.S: Likewise. + 2018-08-01 Martin Liska * libgcov-profiler.c (__gcov_indirect_call_profiler_v2): Do not diff --git a/libgcc/config/arm/ieee754-df.S b/libgcc/config/arm/ieee754-df.S index 7f2afb284d2..480e33da31f 100644 --- a/libgcc/config/arm/ieee754-df.S +++ b/libgcc/config/arm/ieee754-df.S @@ -1,7 +1,7 @@ /* ieee754-df.S double-precision floating point support for ARM Copyright (C) 2003-2018 Free Software Foundation, Inc. - Contributed by Nicolas Pitre (nico@cam.org) + Contributed by Nicolas Pitre (nico@fluxnic.net) This file is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the @@ -238,9 +238,10 @@ LSYM(Lad_a): movs ip, ip, lsl #1 adcs xl, xl, xl adc xh, xh, xh - tst xh, #0x00100000 - sub r4, r4, #1 - bne LSYM(Lad_e) + subs r4, r4, #1 + do_it hs + cmphs xh, #0x00100000 + bhs LSYM(Lad_e) @ No rounding necessary since ip will always be 0 at this point. LSYM(Lad_l): diff --git a/libgcc/config/arm/ieee754-sf.S b/libgcc/config/arm/ieee754-sf.S index e8ee76e31df..28e0d793281 100644 --- a/libgcc/config/arm/ieee754-sf.S +++ b/libgcc/config/arm/ieee754-sf.S @@ -1,7 +1,7 @@ /* ieee754-sf.S single-precision floating point support for ARM Copyright (C) 2003-2018 Free Software Foundation, Inc. - Contributed by Nicolas Pitre (nico@cam.org) + Contributed by Nicolas Pitre (nico@fluxnic.net) This file is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the @@ -168,10 +168,11 @@ LSYM(Lad_e): LSYM(Lad_a): movs r1, r1, lsl #1 adc r0, r0, r0 - tst r0, #0x00800000 - sub r2, r2, #1 - bne LSYM(Lad_e) - + subs r2, r2, #1 + do_it hs + cmphs r0, #0x00800000 + bhs LSYM(Lad_e) + @ No rounding necessary since r1 will always be 0 at this point. LSYM(Lad_l):