From: Jordan Justen Date: Thu, 2 Mar 2017 00:52:23 +0000 (-0800) Subject: i965: Add shader cache support for compute X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8a019f5601ced415d13f55e3c06ab4cb3b7d5989;p=mesa.git i965: Add shader cache support for compute v2: * Use MAYBE_UNUSED. (Matt) Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri Reviewed-by: Jason Ekstrand Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c index 1d34a8a79d1..71d0beaae97 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.c +++ b/src/mesa/drivers/dri/i965/brw_cs.c @@ -130,7 +130,7 @@ brw_codegen_cs_prog(struct brw_context *brw, } -static void +void brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key) { struct gl_context *ctx = &brw->ctx; @@ -168,14 +168,20 @@ brw_upload_cs_prog(struct brw_context *brw) brw_cs_populate_key(brw, &key); - if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG, - &key, sizeof(key), - &brw->cs.base.prog_offset, - &brw->cs.base.prog_data)) { - bool success = brw_codegen_cs_prog(brw, cp, &key); - (void) success; - assert(success); - } + if (brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG, + &key, sizeof(key), + &brw->cs.base.prog_offset, + &brw->cs.base.prog_data)) + return; + + if (brw_disk_cache_upload_program(brw, MESA_SHADER_COMPUTE)) + return; + + cp = (struct brw_program *) brw->programs[MESA_SHADER_COMPUTE]; + cp->id = key.program_string_id; + + MAYBE_UNUSED bool success = brw_codegen_cs_prog(brw, cp, &key); + assert(success); } diff --git a/src/mesa/drivers/dri/i965/brw_cs.h b/src/mesa/drivers/dri/i965/brw_cs.h index 890a0c8a807..60eb19c3594 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.h +++ b/src/mesa/drivers/dri/i965/brw_cs.h @@ -32,6 +32,9 @@ extern "C" { void brw_upload_cs_prog(struct brw_context *brw); +void +brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key); + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c b/src/mesa/drivers/dri/i965/brw_disk_cache.c index 3511eaacf02..eef58d5ba3f 100644 --- a/src/mesa/drivers/dri/i965/brw_disk_cache.c +++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c @@ -31,6 +31,7 @@ #include "brw_context.h" #include "brw_program.h" +#include "brw_cs.h" #include "brw_gs.h" #include "brw_state.h" #include "brw_vs.h" @@ -137,6 +138,10 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache, brw_wm_populate_key(brw, &prog_key.wm); prog_key.wm.program_string_id = 0; break; + case MESA_SHADER_COMPUTE: + brw_cs_populate_key(brw, &prog_key.cs); + prog_key.cs.program_string_id = 0; + break; default: unreachable("Unsupported stage!"); } @@ -211,6 +216,11 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache, cache_id = BRW_CACHE_FS_PROG; stage_state = &brw->wm.base; break; + case MESA_SHADER_COMPUTE: + prog_key.cs.program_string_id = brw_program(prog)->id; + cache_id = BRW_CACHE_CS_PROG; + stage_state = &brw->cs.base; + break; default: unreachable("Unsupported stage!"); } @@ -288,7 +298,7 @@ write_program_data(struct brw_context *brw, struct gl_program *prog, } void -brw_disk_cache_write_program(struct brw_context *brw) +brw_disk_cache_write_render_programs(struct brw_context *brw) { struct disk_cache *cache = brw->ctx.Cache; if (cache == NULL) @@ -350,3 +360,23 @@ brw_disk_cache_write_program(struct brw_context *brw) MESA_SHADER_FRAGMENT); } } + +void +brw_disk_cache_write_compute_program(struct brw_context *brw) +{ + struct disk_cache *cache = brw->ctx.Cache; + if (cache == NULL) + return; + + struct gl_program *prog = + brw->ctx._Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + if (prog && !prog->program_written_to_cache) { + struct brw_cs_prog_key cs_key; + brw_cs_populate_key(brw, &cs_key); + cs_key.program_string_id = 0; + + write_program_data(brw, prog, &cs_key, brw->cs.base.prog_data, + brw->cs.base.prog_offset, cache, + MESA_SHADER_COMPUTE); + } +} diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 6f2e0501b4b..c98b7facd57 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -134,7 +134,8 @@ void gen8_write_pma_stall_bits(struct brw_context *brw, /* brw_disk_cache.c */ bool brw_disk_cache_upload_program(struct brw_context *brw, gl_shader_stage stage); -void brw_disk_cache_write_program(struct brw_context *brw); +void brw_disk_cache_write_compute_program(struct brw_context *brw); +void brw_disk_cache_write_render_programs(struct brw_context *brw); /*********************************************************************** * brw_state.c diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 60f54a9cd0b..9e1cf54abda 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -419,9 +419,10 @@ brw_upload_programs(struct brw_context *brw, brw_upload_sf_prog(brw); } - brw_disk_cache_write_program(brw); + brw_disk_cache_write_render_programs(brw); } else if (pipeline == BRW_COMPUTE_PIPELINE) { brw_upload_cs_prog(brw); + brw_disk_cache_write_compute_program(brw); } }