From: Miodrag Milanovic <mmicko@gmail.com>
Date: Sun, 4 Aug 2019 10:17:55 +0000 (+0200)
Subject: clock for ram trough gbuf
X-Git-Tag: working-ls180~1116^2~9
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8a3329871ba7bab98982a101327b8375cd73344d;p=yosys.git

clock for ram trough gbuf
---

diff --git a/techlibs/efinix/efinix_gbuf.cc b/techlibs/efinix/efinix_gbuf.cc
index 50f84c30c..e75fb3f4d 100644
--- a/techlibs/efinix/efinix_gbuf.cc
+++ b/techlibs/efinix/efinix_gbuf.cc
@@ -38,6 +38,12 @@ static void handle_gbufs(Module *module)
 			for (auto bit : sigmap(cell->getPort("\\CLK")))
 				clk_bits.insert(bit);
 		}
+		if (cell->type == "\\EFX_RAM_5K") {
+			for (auto bit : sigmap(cell->getPort("\\RCLK")))
+				clk_bits.insert(bit);
+			for (auto bit : sigmap(cell->getPort("\\WCLK")))
+				clk_bits.insert(bit);
+		}
 	}
 
 	for (auto wire : vector<Wire*>(module->wires()))