From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Fri, 9 Oct 2020 09:34:15 +0000 (+0100)
Subject: PR target/97349 AArch64: Incorrect types for some Neon vdupq_n_<...> intrinsics
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8a3da2e6060ff0f61dae6aaada716e2c67f3d54f;p=gcc.git

PR target/97349 AArch64: Incorrect types for some Neon vdupq_n_<...> intrinsics

This patch fixes the PR by adjusting the input types of the intrinsic
prototypes to the ones mandated by ACLE
Turns out the tests in the testsuite were already using the correct
ones, but implicit conversions hid the bug...

Bootstrapped and tested on aarch64-none-linux-gnu.

gcc/
	PR target/97349
	* config/aarch64/arm_neon.h (vdupq_n_p8, vdupq_n_p16,
	vdupq_n_p64, vdupq_n_s8, vdupq_n_s16, vdupq_n_u8, vdupq_n_u16):
	Fix argument type.

gcc/testsuite/
	PR target/97349
	* gcc.target/aarch64/simd/pr97349.c: New test.
---

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index d943f63a274..85c0d62ca12 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -15615,7 +15615,7 @@ vdupq_n_f64 (float64_t __a)
 
 __extension__ extern __inline poly8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_p8 (uint32_t __a)
+vdupq_n_p8 (poly8_t __a)
 {
   return (poly8x16_t) {__a, __a, __a, __a, __a, __a, __a, __a,
 		       __a, __a, __a, __a, __a, __a, __a, __a};
@@ -15623,21 +15623,21 @@ vdupq_n_p8 (uint32_t __a)
 
 __extension__ extern __inline poly16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_p16 (uint32_t __a)
+vdupq_n_p16 (poly16_t __a)
 {
   return (poly16x8_t) {__a, __a, __a, __a, __a, __a, __a, __a};
 }
 
 __extension__ extern __inline poly64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_p64 (uint64_t __a)
+vdupq_n_p64 (poly64_t __a)
 {
   return (poly64x2_t) {__a, __a};
 }
 
 __extension__ extern __inline int8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_s8 (int32_t __a)
+vdupq_n_s8 (int8_t __a)
 {
   return (int8x16_t) {__a, __a, __a, __a, __a, __a, __a, __a,
 		      __a, __a, __a, __a, __a, __a, __a, __a};
@@ -15645,7 +15645,7 @@ vdupq_n_s8 (int32_t __a)
 
 __extension__ extern __inline int16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_s16 (int32_t __a)
+vdupq_n_s16 (int16_t __a)
 {
   return (int16x8_t) {__a, __a, __a, __a, __a, __a, __a, __a};
 }
@@ -15666,7 +15666,7 @@ vdupq_n_s64 (int64_t __a)
 
 __extension__ extern __inline uint8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_u8 (uint32_t __a)
+vdupq_n_u8 (uint8_t __a)
 {
   return (uint8x16_t) {__a, __a, __a, __a, __a, __a, __a, __a,
 		       __a, __a, __a, __a, __a, __a, __a, __a};
@@ -15674,7 +15674,7 @@ vdupq_n_u8 (uint32_t __a)
 
 __extension__ extern __inline uint16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vdupq_n_u16 (uint32_t __a)
+vdupq_n_u16 (uint16_t __a)
 {
   return (uint16x8_t) {__a, __a, __a, __a, __a, __a, __a, __a};
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/pr97349.c b/gcc/testsuite/gcc.target/aarch64/simd/pr97349.c
new file mode 100644
index 00000000000..026767a7243
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/pr97349.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+
+#include <arm_neon.h>
+
+poly16x8_t  (*fp0)(poly16_t) = vdupq_n_p16;
+poly64x2_t  (*fp1)(poly64_t) = vdupq_n_p64;
+poly8x16_t  (*fp2)(poly8_t)  = vdupq_n_p8;
+int16x8_t   (*fp3)(int16_t)  = vdupq_n_s16;
+int8x16_t   (*fp4)(int8_t)   = vdupq_n_s8;
+uint16x8_t  (*fp5)(uint16_t) = vdupq_n_u16;
+uint8x16_t  (*fp6)(uint8_t)  = vdupq_n_u8;
+