From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 16 Jul 2020 09:51:52 +0000 (+0100)
Subject: add regression test on setb simulator error
X-Git-Tag: div_pipeline~6
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8a410657e4c854aeb07d26142446d0167ab3d5b4;p=soc.git

add regression test on setb simulator error
---

diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py
index 27ea17b7..a87bb896 100644
--- a/src/soc/fu/cr/test/test_pipe_caller.py
+++ b/src/soc/fu/cr/test/test_pipe_caller.py
@@ -134,6 +134,12 @@ class CRTestCase(FHDLTestCase):
             cr = random.randint(0, (1<<32)-1)
             self.run_tst_program(Program(lst, bigendian), initial_cr=cr)
 
+    def test_regression_setb(self):
+        lst = [f"setb 1, 6"]
+        cr = random.randint(0, 0x66f6b106)
+        self.run_tst_program(Program(lst, bigendian), initial_cr=cr)
+
+
     def test_ilang(self):
         pspec = CRPipeSpec(id_wid=2)
         alu = CRBasePipe(pspec)