From: Andrea Corallo <andrea.corallo@arm.com>
Date: Thu, 9 Apr 2020 14:34:50 +0000 (+0100)
Subject: aarch64: Fix valid_src_p for use of uninitialized value
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8a4436d89bfa0f731a48bf28d521f4b1b91014d7;p=gcc.git

aarch64: Fix valid_src_p for use of uninitialized value

2020-04-15  Andrea Corallo  <andrea.corallo@arm.com>

	* config/aarch64/falkor-tag-collision-avoidance.c
	(valid_src_p): Check for aarch64_address_info type before
	accessing base field.
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 80e21dced64..55f2e967325 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-04-15  Andrea Corallo  <andrea.corallo@arm.com>
+
+	* config/aarch64/falkor-tag-collision-avoidance.c
+	(valid_src_p): Check for aarch64_address_info type before
+	accessing base field.
+
 2020-04-15  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
 	* config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
diff --git a/gcc/config/aarch64/falkor-tag-collision-avoidance.c b/gcc/config/aarch64/falkor-tag-collision-avoidance.c
index f850153fae0..a96a3320e8f 100644
--- a/gcc/config/aarch64/falkor-tag-collision-avoidance.c
+++ b/gcc/config/aarch64/falkor-tag-collision-avoidance.c
@@ -538,7 +538,11 @@ valid_src_p (rtx src, rtx_insn *insn, struct loop *loop, bool *pre_post,
   if (!aarch64_classify_address (&addr, XEXP (x, 0), mode, true))
     return false;
 
-  if (!REG_P (addr.base))
+  if (addr.type != ADDRESS_REG_IMM
+      && addr.type != ADDRESS_REG_WB
+      && addr.type != ADDRESS_REG_REG
+      && addr.type != ADDRESS_REG_UXTW
+      && addr.type != ADDRESS_REG_SXTW)
     return false;
 
   unsigned regno = REGNO (addr.base);