From: Richard Sandiford <richard.sandiford@arm.com>
Date: Wed, 7 Aug 2019 18:47:26 +0000 (+0000)
Subject: [AArch64] Remove redundant SVE FADDA pattern
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8ad84de26e1032d80225905c611a47b64a385e8a;p=gcc.git

[AArch64] Remove redundant SVE FADDA pattern

*pred_fold_left_plus_<mode> could no longer match anything, since
UNSPEC_FADDA now takes three operands.  Predicated FADDAs should
now go through mask_fold_left_plus_<mode> instead.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete.

From-SVN: r274186
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa0ad4aff3e..c292eec6013 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete.
+
 2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* config/aarch64/iterators.md (UNSPEC_COND_ADD): Rename to...
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index b66066becb6..6c40979cb65 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -3468,21 +3468,6 @@
   "fadda\t%<Vetype>0, %3, %<Vetype>0, %2.<Vetype>"
 )
 
-;; Predicated form of the above in-order reduction.
-(define_insn "*pred_fold_left_plus_<mode>"
-  [(set (match_operand:<VEL> 0 "register_operand" "=w")
-	(unspec:<VEL>
-	  [(match_operand:<VEL> 1 "register_operand" "0")
-	   (unspec:SVE_F
-	     [(match_operand:<VPRED> 2 "register_operand" "Upl")
-	      (match_operand:SVE_F 3 "register_operand" "w")
-	      (match_operand:SVE_F 4 "aarch64_simd_imm_zero")]
-	     UNSPEC_SEL)]
-	  UNSPEC_FADDA))]
-  "TARGET_SVE"
-  "fadda\t%<Vetype>0, %2, %<Vetype>0, %3.<Vetype>"
-)
-
 ;; =========================================================================
 ;; == Permutes
 ;; =========================================================================