From: Tobias Platen <tplaten@posteo.de>
Date: Tue, 28 Sep 2021 18:34:08 +0000 (+0200)
Subject: rename ra_needed to zero_a
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8b52fb5fb41d087659345f9b80d1def85c485b2b;p=soc.git

rename ra_needed to zero_a
---

diff --git a/src/soc/experiment/test/test_compldst_multi_mmu.py b/src/soc/experiment/test/test_compldst_multi_mmu.py
index a2a2c02f..b2e538e6 100644
--- a/src/soc/experiment/test/test_compldst_multi_mmu.py
+++ b/src/soc/experiment/test/test_compldst_multi_mmu.py
@@ -60,7 +60,7 @@ def load_part(dut, src1, src2, imm, imm_ok=True, update=False, zero_a=False,
 # EA <- b + (RB)            RB needs to be read
 # verify that EA is correct first
 def dcbz(dut, ra, zero_a, rb):
-    print("LD_part", ra, ra_needed, rb)
+    print("LD_part", ra, zero_a, rb)
     yield dut.oper_i.insn_type.eq(MicrOp.OP_DCBZ)
     yield dut.src1_i.eq(ra)
     yield dut.src2_i.eq(rb)