From: Jakub Jelinek Date: Tue, 22 Jan 2019 22:30:44 +0000 (+0100) Subject: re PR target/88965 (powerpc64le vector builtin hits ICE in verify_gimple) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8b5d2c55128d953d1d2d29362ea4522057bc016a;p=gcc.git re PR target/88965 (powerpc64le vector builtin hits ICE in verify_gimple) PR target/88965 * config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h. (rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first. * gcc.target/powerpc/pr88965.c: New test. From-SVN: r268166 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 86ebc0f44dd..215d47d9723 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2019-01-22 Jakub Jelinek + PR target/88965 + * config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h. + (rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy + is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first. + PR middle-end/88968 * gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with non-integral DECL_BIT_FIELD_REPRESENTATIVEs. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3b31ba9828b..a7233462f94 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -81,6 +81,8 @@ #include "case-cfn-macros.h" #include "ppc-auxv.h" #include "tree-ssa-propagate.h" +#include "tree-vrp.h" +#include "tree-ssanames.h" /* This file should be included last. */ #include "target-def.h" @@ -15852,6 +15854,13 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) arg1_type, temp_addr, build_int_cst (arg1_type, -16)); gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); + if (!is_gimple_mem_ref_addr (aligned_addr)) + { + tree t = make_ssa_name (TREE_TYPE (aligned_addr)); + gimple *g = gimple_build_assign (t, aligned_addr); + gsi_insert_before (gsi, g, GSI_SAME_STMT); + aligned_addr = t; + } /* Use the build2 helper to set up the mem_ref. The MEM_REF could also take an offset, but since we've already incorporated the offset above, here we just pass in a zero. */ @@ -15897,6 +15906,13 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) arg2_type, temp_addr, build_int_cst (arg2_type, -16)); gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); + if (!is_gimple_mem_ref_addr (aligned_addr)) + { + tree t = make_ssa_name (TREE_TYPE (aligned_addr)); + gimple *g = gimple_build_assign (t, aligned_addr); + gsi_insert_before (gsi, g, GSI_SAME_STMT); + aligned_addr = t; + } /* The desired gimple result should be similar to: MEM[(__vector floatD.1407 *)_1] = vf1D.2697; */ gimple *g @@ -15934,6 +15950,13 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, arg1_type, arg1, temp_offset); gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); + if (!is_gimple_mem_ref_addr (temp_addr)) + { + tree t = make_ssa_name (TREE_TYPE (temp_addr)); + gimple *g = gimple_build_assign (t, temp_addr); + gsi_insert_before (gsi, g, GSI_SAME_STMT); + temp_addr = t; + } /* Use the build2 helper to set up the mem_ref. The MEM_REF could also take an offset, but since we've already incorporated the offset above, here we just pass in a zero. */ @@ -15970,6 +15993,13 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, arg2_type, arg2, temp_offset); gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); + if (!is_gimple_mem_ref_addr (temp_addr)) + { + tree t = make_ssa_name (TREE_TYPE (temp_addr)); + gimple *g = gimple_build_assign (t, temp_addr); + gsi_insert_before (gsi, g, GSI_SAME_STMT); + temp_addr = t; + } gimple *g; g = gimple_build_assign (build2 (MEM_REF, align_stype, temp_addr, build_int_cst (arg2_type, 0)), arg0); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 997b48ef014..8bdc54a2c9d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,8 @@ 2019-01-22 Jakub Jelinek + PR target/88965 + * gcc.target/powerpc/pr88965.c: New test. + PR middle-end/88968 * c-c++-common/gomp/atomic-23.c: New test. diff --git a/gcc/testsuite/gcc.target/powerpc/pr88965.c b/gcc/testsuite/gcc.target/powerpc/pr88965.c new file mode 100644 index 00000000000..e5ea0fab125 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr88965.c @@ -0,0 +1,19 @@ +/* PR target/88965 */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mvsx" } */ + +unsigned int a[16]; +unsigned int __attribute__ ((vector_size (16))) b; + +void +foo (void) +{ + b = __builtin_vec_vsx_ld (0, &a[0]); +} + +void +bar (void) +{ + __builtin_vec_vsx_st (b, 0, &a[0]); +}