From: Cesar Strauss <cestrauss@gmail.com>
Date: Sun, 7 Apr 2024 17:29:01 +0000 (-0300)
Subject: ls2: fix keyword for declaring pin voltage type on Xilinx devices
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8b798c2466bdd73f9a17f77a8ceba2b4929b0473;p=ls2.git

ls2: fix keyword for declaring pin voltage type on Xilinx devices
---

diff --git a/src/ls2.py b/src/ls2.py
index 5ffab70..2a17fae 100644
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -968,7 +968,7 @@ def build_platform(fpga, firmware):
                      Subsignal("dq3",  Pins("M14", dir="io")),
                      Subsignal("cs_n", Pins("L13", dir="o")),
                      Subsignal("clk",  Pins("L16", dir="o")),
-                     Attrs(PULLMODE="NONE", DRIVE="4", IO_TYPE="LVCMOS33"))
+                     Attrs(PULLMODE="NONE", DRIVE="4", IOSTANDARD="LVCMOS33"))
         ]
         platform.add_resources(spi_0_ios)
         spi_0_pins = platform.request("spi_0", 0)