From: Sebastien Bourdeauducq Date: Sun, 1 Jul 2012 16:13:49 +0000 (+0200) Subject: framebuffer: register output of FIFO X-Git-Tag: 24jan2021_ls180~3121 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8ba3118a83cb458f3b0cad0590595c93a9c75aa0;p=litex.git framebuffer: register output of FIFO --- diff --git a/milkymist/framebuffer/__init__.py b/milkymist/framebuffer/__init__.py index 13b6d54c..ad146c9c 100644 --- a/milkymist/framebuffer/__init__.py +++ b/milkymist/framebuffer/__init__.py @@ -191,7 +191,6 @@ class FIFO(Actor): clkport="clk_write") t = self.token("dac") return Fragment([ - Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"]), asfifo.ins["read_en"].eq(1), self.endpoints["dac"].ack.eq(~asfifo.outs["full"]), @@ -200,7 +199,10 @@ class FIFO(Actor): self.busy.eq(0), asfifo.ins["rst"].eq(0) - ], instances=[asfifo]) + ], [ + Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"]) + ], + instances=[asfifo]) class Framebuffer: def __init__(self, address, asmiport):