From: Gabe Black <gblack@eecs.umich.edu>
Date: Fri, 21 Jul 2006 01:01:57 +0000 (-0400)
Subject: Fixed a glitch in the disassembly output.
X-Git-Tag: m5_2.0_beta1~65
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8bbe925192d786a07bb5f4fac90e11f4983f92b7;p=gem5.git

Fixed a glitch in the disassembly output.

--HG--
extra : convert_revision : 833aa358b12ac987e0ab467708425c17e5a8fdb7
---

diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index f9c750901..b518265aa 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -85,7 +85,7 @@ output header {{
             std::string generateDisassembly(Addr pc,
                 const SymbolTable *symtab) const;
 
-            void printReg(std::ostream &os, RegIndex reg) const;
+            void printReg(std::ostream &os, int reg) const;
             void printSrcReg(std::ostream &os, int reg) const;
             void printDestReg(std::ostream &os, int reg) const;
 
@@ -183,7 +183,7 @@ output decoder {{
         }
 
         void
-        SparcStaticInst::printReg(std::ostream &os, RegIndex reg) const
+        SparcStaticInst::printReg(std::ostream &os, int reg) const
         {
             const int MaxGlobal = 8;
             const int MaxOutput = 16;